diff options
author | Andreas Hansson <andreas.hansson@arm.com> | 2012-01-31 11:51:19 -0500 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2012-01-31 11:51:19 -0500 |
commit | 4590b91fb8842f6a3b823bbc06334132de43d54b (patch) | |
tree | 72a17ff25a0be08e4bc3576ff9e179974817c722 /src/mem | |
parent | 4fdecae443c4f11d24b7da537b6f7a2baadbd130 (diff) | |
download | gem5-4590b91fb8842f6a3b823bbc06334132de43d54b.tar.xz |
MEM: Remove the otherPort from the cache ports
This patch is a very straight-forward simplification, removing the
unecessary otherPort pointer from the cache port. The pointer was only
used to forward range changes, and the address range is fixed for the
cache. Removing the pointer simplifies the transition to master/slave
ports.
Diffstat (limited to 'src/mem')
-rw-r--r-- | src/mem/cache/base.cc | 9 | ||||
-rw-r--r-- | src/mem/cache/base.hh | 6 | ||||
-rw-r--r-- | src/mem/cache/cache_impl.hh | 2 |
3 files changed, 1 insertions, 16 deletions
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc index 278329152..34132a634 100644 --- a/src/mem/cache/base.cc +++ b/src/mem/cache/base.cc @@ -44,8 +44,7 @@ using namespace std; BaseCache::CachePort::CachePort(const std::string &_name, BaseCache *_cache, const std::string &_label) : SimpleTimingPort(_name, _cache), cache(_cache), - label(_label), otherPort(NULL), - blocked(false), mustSendRetry(false) + label(_label), blocked(false), mustSendRetry(false) { } @@ -69,12 +68,6 @@ BaseCache::BaseCache(const Params *p) { } -void -BaseCache::CachePort::recvRangeChange() const -{ - otherPort->sendRangeChange(); -} - bool BaseCache::CachePort::checkFunctional(PacketPtr pkt) diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh index e6a5c284f..df72e197f 100644 --- a/src/mem/cache/base.hh +++ b/src/mem/cache/base.hh @@ -105,8 +105,6 @@ class BaseCache : public MemObject CachePort(const std::string &_name, BaseCache *_cache, const std::string &_label); - virtual void recvRangeChange() const; - virtual unsigned deviceBlockSize() const; bool recvRetryCommon(); @@ -117,16 +115,12 @@ class BaseCache : public MemObject const std::string label; public: - void setOtherPort(CachePort *_otherPort) { otherPort = _otherPort; } - void setBlocked(); void clearBlocked(); bool checkFunctional(PacketPtr pkt); - CachePort *otherPort; - bool blocked; bool mustSendRetry; diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index 13484eb79..2ef53e040 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -77,8 +77,6 @@ Cache<TagStore>::Cache(const Params *p, TagStore *tags, BasePrefetcher *pf) "CpuSidePort"); memSidePort = new MemSidePort(p->name + "-mem_side_port", this, "MemSidePort"); - cpuSidePort->setOtherPort(memSidePort); - memSidePort->setOtherPort(cpuSidePort); tags->setCache(this); if (prefetcher) |