summaryrefslogtreecommitdiff
path: root/src/mem
diff options
context:
space:
mode:
authorAndreas Hansson <andreas.hansson@arm.com>2014-09-03 07:42:54 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2014-09-03 07:42:54 -0400
commit2698e739660516af442c0f913eb0e91a00e7b7db (patch)
tree331dfa865e3b36d5187353fe3db57f93c73eb0e0 /src/mem
parent1ff4c45bbbaa22d5bd91e9bdd34d4435290ab8be (diff)
downloadgem5-2698e739660516af442c0f913eb0e91a00e7b7db.tar.xz
base: Use the global Mersenne twister throughout
This patch tidies up random number generation to ensure that it is done consistently throughout the code base. In essence this involves a clean-up of Ruby, and some code simplifications in the traffic generator. As part of this patch a bunch of skewed distributions (off-by-one etc) have been fixed. Note that a single global random number generator is used, and that the object instantiation order will impact the behaviour (the sequence of numbers will be unaffected, but if module A calles random before module B then they would obviously see a different outcome). The dependency on the instantiation order is true in any case due to the execution-model of gem5, so we leave it as is. Also note that the global ranom generator is not thread safe at this point. Regressions using the memtest, TrafficGen or any Ruby tester are affected and will be updated accordingly.
Diffstat (limited to 'src/mem')
-rw-r--r--src/mem/ruby/common/NetDest.cc7
-rw-r--r--src/mem/ruby/common/NetDest.hh1
-rw-r--r--src/mem/ruby/common/Set.cc16
-rw-r--r--src/mem/ruby/common/Set.hh1
-rw-r--r--src/mem/ruby/network/MessageBuffer.cc7
-rw-r--r--src/mem/ruby/network/simple/PerfectSwitch.cc4
-rw-r--r--src/mem/ruby/slicc_interface/RubySlicc_Util.hh6
-rw-r--r--src/mem/ruby/structures/RubyMemoryControl.cc5
8 files changed, 10 insertions, 37 deletions
diff --git a/src/mem/ruby/common/NetDest.cc b/src/mem/ruby/common/NetDest.cc
index b8c490ac5..0a89bda53 100644
--- a/src/mem/ruby/common/NetDest.cc
+++ b/src/mem/ruby/common/NetDest.cc
@@ -52,13 +52,6 @@ NetDest::addNetDest(const NetDest& netDest)
}
void
-NetDest::addRandom()
-{
- int i = random()%m_bits.size();
- m_bits[i].addRandom();
-}
-
-void
NetDest::setNetDest(MachineType machine, const Set& set)
{
// assure that there is only one set of destinations for this machine
diff --git a/src/mem/ruby/common/NetDest.hh b/src/mem/ruby/common/NetDest.hh
index ba72fe214..9914ca218 100644
--- a/src/mem/ruby/common/NetDest.hh
+++ b/src/mem/ruby/common/NetDest.hh
@@ -55,7 +55,6 @@ class NetDest
void add(MachineID newElement);
void addNetDest(const NetDest& netDest);
- void addRandom();
void setNetDest(MachineType machine, const Set& set);
void remove(MachineID oldElement);
void removeNetDest(const NetDest& netDest);
diff --git a/src/mem/ruby/common/Set.cc b/src/mem/ruby/common/Set.cc
index c674655ab..280fe71b4 100644
--- a/src/mem/ruby/common/Set.cc
+++ b/src/mem/ruby/common/Set.cc
@@ -103,22 +103,6 @@ Set::addSet(const Set& set)
}
/*
- * This function should randomly assign 1 to the bits in the set--it
- * should not clear the bits bits first, though?
- */
-void
-Set::addRandom()
-{
-
- for (int i = 0; i < m_nArrayLen; i++) {
- // this ensures that all 32 bits are subject to random effects,
- // as RAND_MAX typically = 0x7FFFFFFF
- m_p_nArray[i] |= random() ^ (random() << 4);
- }
- clearExcess();
-}
-
-/*
* This function clears bits that are =1 in the parameter set
*/
void
diff --git a/src/mem/ruby/common/Set.hh b/src/mem/ruby/common/Set.hh
index 724c5d9e9..bedd44aa6 100644
--- a/src/mem/ruby/common/Set.hh
+++ b/src/mem/ruby/common/Set.hh
@@ -87,7 +87,6 @@ class Set
}
void addSet(const Set& set);
- void addRandom();
void
remove(NodeID index)
diff --git a/src/mem/ruby/network/MessageBuffer.cc b/src/mem/ruby/network/MessageBuffer.cc
index 1961765c5..1bc55c2c9 100644
--- a/src/mem/ruby/network/MessageBuffer.cc
+++ b/src/mem/ruby/network/MessageBuffer.cc
@@ -30,6 +30,7 @@
#include "base/cprintf.hh"
#include "base/misc.hh"
+#include "base/random.hh"
#include "base/stl_helpers.hh"
#include "debug/RubyQueue.hh"
#include "mem/ruby/network/MessageBuffer.hh"
@@ -133,9 +134,9 @@ Cycles
random_time()
{
Cycles time(1);
- time += Cycles(random() & 0x3); // [0...3]
- if ((random() & 0x7) == 0) { // 1 in 8 chance
- time += Cycles(100 + (random() % 0xf)); // 100 + [1...15]
+ time += Cycles(random_mt.random(0, 3)); // [0...3]
+ if (random_mt.random(0, 7) == 0) { // 1 in 8 chance
+ time += Cycles(100 + random_mt.random(1, 15)); // 100 + [1...15]
}
return time;
}
diff --git a/src/mem/ruby/network/simple/PerfectSwitch.cc b/src/mem/ruby/network/simple/PerfectSwitch.cc
index fa0709496..caf07b3cf 100644
--- a/src/mem/ruby/network/simple/PerfectSwitch.cc
+++ b/src/mem/ruby/network/simple/PerfectSwitch.cc
@@ -29,6 +29,7 @@
#include <algorithm>
#include "base/cast.hh"
+#include "base/random.hh"
#include "debug/RubyNetwork.hh"
#include "mem/ruby/network/MessageBuffer.hh"
#include "mem/ruby/network/simple/PerfectSwitch.hh"
@@ -169,7 +170,8 @@ PerfectSwitch::operateVnet(int vnet)
out_queue_length += m_out[out][v]->getSize();
}
int value =
- (out_queue_length << 8) | (random() & 0xff);
+ (out_queue_length << 8) |
+ random_mt.random(0, 0xff);
m_link_order[out].m_link = out;
m_link_order[out].m_value = value;
}
diff --git a/src/mem/ruby/slicc_interface/RubySlicc_Util.hh b/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
index 4398a4a00..5ec34f2dc 100644
--- a/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
+++ b/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
@@ -40,12 +40,6 @@
#include "mem/ruby/common/DataBlock.hh"
#include "mem/packet.hh"
-inline int
-random(int n)
-{
- return random() % n;
-}
-
inline Cycles zero_time() { return Cycles(0); }
inline NodeID
diff --git a/src/mem/ruby/structures/RubyMemoryControl.cc b/src/mem/ruby/structures/RubyMemoryControl.cc
index bc01c7f94..69fd45fe4 100644
--- a/src/mem/ruby/structures/RubyMemoryControl.cc
+++ b/src/mem/ruby/structures/RubyMemoryControl.cc
@@ -107,6 +107,7 @@
#include "base/cast.hh"
#include "base/cprintf.hh"
+#include "base/random.hh"
#include "debug/RubyMemory.hh"
#include "mem/ruby/common/Address.hh"
#include "mem/ruby/common/Global.hh"
@@ -437,7 +438,7 @@ RubyMemoryControl::queueReady(int bank)
}
if (m_mem_random_arbitrate >= 2) {
- if ((random() % 100) < m_mem_random_arbitrate) {
+ if (random_mt.random(0, 100) < m_mem_random_arbitrate) {
m_profiler_ptr->profileMemRandBusy();
return false;
}
@@ -614,7 +615,7 @@ RubyMemoryControl::executeCycle()
// If randomness desired, re-randomize round-robin position each cycle
if (m_mem_random_arbitrate) {
- m_roundRobin = random() % m_total_banks;
+ m_roundRobin = random_mt.random(0, m_total_banks - 1);
}
// For each channel, scan round-robin, and pick an old, ready