diff options
author | Daniel R. Carvalho <odanrc@yahoo.com.br> | 2018-02-26 15:22:33 +0100 |
---|---|---|
committer | Daniel Carvalho <odanrc@yahoo.com.br> | 2018-03-01 08:14:33 +0000 |
commit | 3c076e4d69b38be9e4ce7ca9cfb7145ae6f27393 (patch) | |
tree | 5e0ceaa3782b22db7fa01e521955be3b01f915ad /src/mem | |
parent | f4d83eaf52926aa379292a9f75ba6b36eb04c52d (diff) | |
download | gem5-3c076e4d69b38be9e4ce7ca9cfb7145ae6f27393.tar.xz |
mem-cache: Vectorize C arrays in BaseSetAssoc.
Transform BaseSetAssoc's arrays into C++ vectors to avoid unnecessary
resource management.
Change-Id: I656f42f29e5f9589eba491b410ca1df5a64f2f34
Reviewed-on: https://gem5-review.googlesource.com/8621
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/mem')
-rw-r--r-- | src/mem/cache/tags/base.cc | 2 | ||||
-rw-r--r-- | src/mem/cache/tags/base_set_assoc.cc | 18 | ||||
-rw-r--r-- | src/mem/cache/tags/base_set_assoc.hh | 19 |
3 files changed, 16 insertions, 23 deletions
diff --git a/src/mem/cache/tags/base.cc b/src/mem/cache/tags/base.cc index aa8a34f2d..8b52b746e 100644 --- a/src/mem/cache/tags/base.cc +++ b/src/mem/cache/tags/base.cc @@ -63,7 +63,7 @@ BaseTags::BaseTags(const Params *p) std::max(p->tag_latency, p->data_latency)), cache(nullptr), warmupBound((p->warmup_percentage/100.0) * (p->size / p->block_size)), - warmedUp(false), numBlocks(0) + warmedUp(false), numBlocks(p->size / p->block_size) { } diff --git a/src/mem/cache/tags/base_set_assoc.cc b/src/mem/cache/tags/base_set_assoc.cc index c39822929..728f5a5f9 100644 --- a/src/mem/cache/tags/base_set_assoc.cc +++ b/src/mem/cache/tags/base_set_assoc.cc @@ -56,8 +56,11 @@ using namespace std; BaseSetAssoc::BaseSetAssoc(const Params *p) :BaseTags(p), assoc(p->assoc), allocAssoc(p->assoc), + blks(p->size / p->block_size), + dataBlks(new uint8_t[p->size]), // Allocate data storage in one big chunk numSets(p->size / (p->block_size * p->assoc)), - sequentialAccess(p->sequential_access) + sequentialAccess(p->sequential_access), + sets(p->size / (p->block_size * p->assoc)) { // Check parameters if (blkSize < 4 || !isPowerOf2(blkSize)) { @@ -74,12 +77,6 @@ BaseSetAssoc::BaseSetAssoc(const Params *p) setMask = numSets - 1; tagShift = setShift + floorLog2(numSets); - sets = new SetType[numSets]; - blks = new BlkType[numSets * assoc]; - // allocate data storage in one big chunk - numBlocks = numSets * assoc; - dataBlks = new uint8_t[numBlocks * blkSize]; - unsigned blkIndex = 0; // index into blks array for (unsigned i = 0; i < numSets; ++i) { sets[i].assoc = assoc; @@ -110,13 +107,6 @@ BaseSetAssoc::BaseSetAssoc(const Params *p) } } -BaseSetAssoc::~BaseSetAssoc() -{ - delete [] dataBlks; - delete [] blks; - delete [] sets; -} - CacheBlk* BaseSetAssoc::findBlock(Addr addr, bool is_secure) const { diff --git a/src/mem/cache/tags/base_set_assoc.hh b/src/mem/cache/tags/base_set_assoc.hh index ef4c68b62..cbd48092c 100644 --- a/src/mem/cache/tags/base_set_assoc.hh +++ b/src/mem/cache/tags/base_set_assoc.hh @@ -50,7 +50,8 @@ #include <cassert> #include <cstring> -#include <list> +#include <memory> +#include <vector> #include "mem/cache/base.hh" #include "mem/cache/blk.hh" @@ -87,18 +88,20 @@ class BaseSetAssoc : public BaseTags const unsigned assoc; /** The allocatable associativity of the cache (alloc mask). */ unsigned allocAssoc; + + /** The cache blocks. */ + std::vector<BlkType> blks; + /** The data blocks, 1 per cache block. */ + std::unique_ptr<uint8_t[]> dataBlks; + /** The number of sets in the cache. */ const unsigned numSets; + /** Whether tags and data are accessed sequentially. */ const bool sequentialAccess; /** The cache sets. */ - SetType *sets; - - /** The cache blocks. */ - BlkType *blks; - /** The data blocks, 1 per cache block. */ - uint8_t *dataBlks; + std::vector<SetType> sets; /** The amount to shift the address to get the set. */ int setShift; @@ -120,7 +123,7 @@ public: /** * Destructor */ - virtual ~BaseSetAssoc(); + virtual ~BaseSetAssoc() {}; /** * Find the cache block given set and way |