params: Deprecate old-style constructors; update most SimObject constructors.

SimObjects not yet updated:
- Process and subclasses
- BaseCPU and subclasses

The SimObject(const std::string &name) constructor was removed.  Subclasses
that still rely on that behavior must call the parent initializer as
  : SimObject(makeParams(name))

--HG--
extra : convert_revision : d6faddde76e7c3361ebdbd0a7b372a40941c12ed

19 files changed, 74 insertions, 206 deletions

diff --git a/src/mem/bridge.cc b/src/mem/bridge.cc
index 3434f59fb..3fa9e5bb9 100644
--- a/src/mem/bridge.cc
+++ b/src/mem/bridge.cc
@@ -55,7 +55,7 @@ Bridge::BridgePort::BridgePort(const std::string &_name,
 }
 
 Bridge::Bridge(Params *p)
-    : MemObject(p->name),
+    : MemObject(p),
       portA(p->name + "-portA", this, &portB, p->delay, p->nack_delay,
               p->req_size_a, p->resp_size_a, p->filter_ranges_a),
       portB(p->name + "-portB", this, &portA, p->delay, p->nack_delay,
diff --git a/src/mem/bus.cc b/src/mem/bus.cc
index 3f7b1deaf..cc3504e83 100644
--- a/src/mem/bus.cc
+++ b/src/mem/bus.cc
@@ -39,7 +39,6 @@
 #include "base/misc.hh"
 #include "base/trace.hh"
 #include "mem/bus.hh"
-#include "params/Bus.hh"
 
 Port *
 Bus::getPort(const std::string &if_name, int idx)
@@ -632,5 +631,5 @@ Bus::startup()
 Bus *
 BusParams::create()
 {
-    return new Bus(name, bus_id, clock, width, responder_set, block_size);
+    return new Bus(this);
 }
diff --git a/src/mem/bus.hh b/src/mem/bus.hh
index 0c594c463..9ba43c79d 100644
--- a/src/mem/bus.hh
+++ b/src/mem/bus.hh
@@ -50,6 +50,7 @@
 #include "mem/port.hh"
 #include "mem/request.hh"
 #include "sim/eventq.hh"
+#include "params/Bus.hh"
 
 class Bus : public MemObject
 {
@@ -361,12 +362,11 @@ class Bus : public MemObject
 
     unsigned int drain(Event *de);
 
-    Bus(const std::string &n, int bus_id, int _clock, int _width,
-        bool responder_set, int dflt_blk_size)
-        : MemObject(n), busId(bus_id), clock(_clock), width(_width),
+    Bus(const BusParams *p)
+        : MemObject(p), busId(p->bus_id), clock(p->clock), width(p->width),
           tickNextIdle(0), drainEvent(NULL), busIdle(this), inRetry(false),
           maxId(0), defaultPort(NULL), funcPort(NULL), funcPortId(-4),
-          responderSet(responder_set), defaultBlockSize(dflt_blk_size),
+          responderSet(p->responder_set), defaultBlockSize(p->block_size),
           cachedBlockSize(0), cachedBlockSizeValid(false)
     {
         //Both the width and clock period must be positive
diff --git a/src/mem/cache/base_cache.cc b/src/mem/cache/base_cache.cc
index 0c8b02cb3..c5632e89f 100644
--- a/src/mem/cache/base_cache.cc
+++ b/src/mem/cache/base_cache.cc
@@ -48,22 +48,21 @@ BaseCache::CachePort::CachePort(const std::string &_name, BaseCache *_cache,
 }
 
 
-BaseCache::BaseCache(const std::string &name, Params &params)
-    : MemObject(name),
-      mshrQueue(params.numMSHRs, 4, MSHRQueue_MSHRs),
-      writeBuffer(params.numWriteBuffers, params.numMSHRs+1000,
+BaseCache::BaseCache(const Params *p)
+    : MemObject(p),
+      mshrQueue(p->mshrs, 4, MSHRQueue_MSHRs),
+      writeBuffer(p->write_buffers, p->mshrs+1000,
                   MSHRQueue_WriteBuffer),
-      blkSize(params.blkSize),
-      hitLatency(params.hitLatency),
-      numTarget(params.numTargets),
+      blkSize(p->block_size),
+      hitLatency(p->latency),
+      numTarget(p->tgts_per_mshr),
       blocked(0),
       noTargetMSHR(NULL),
-      missCount(params.maxMisses),
+      missCount(p->max_miss_count),
       drainEvent(NULL)
 {
 }
 
-
 void
 BaseCache::CachePort::recvStatusChange(Port::Status status)
 {
diff --git a/src/mem/cache/base_cache.hh b/src/mem/cache/base_cache.hh
index 6a4eec43e..5049f68f1 100644
--- a/src/mem/cache/base_cache.hh
+++ b/src/mem/cache/base_cache.hh
@@ -52,6 +52,7 @@
 #include "mem/packet.hh"
 #include "mem/tport.hh"
 #include "mem/request.hh"
+#include "params/BaseCache.hh"
 #include "sim/eventq.hh"
 #include "sim/sim_exit.hh"
 
@@ -354,54 +355,9 @@ class BaseCache : public MemObject
     virtual void regStats();
 
   public:
-
-    class Params
-    {
-      public:
-        /** The hit latency for this cache. */
-        int hitLatency;
-        /** The block size of this cache. */
-        int blkSize;
-        int numMSHRs;
-        int numTargets;
-        int numWriteBuffers;
-        /**
-         * The maximum number of misses this cache should handle before
-         * ending the simulation.
-         */
-        Counter maxMisses;
-
-        std::vector<Range<Addr> > cpuSideFilterRanges;
-        std::vector<Range<Addr> > memSideFilterRanges;
-        /**
-         * Construct an instance of this parameter class.
-         */
-        Params(int _hitLatency, int _blkSize,
-               int _numMSHRs, int _numTargets, int _numWriteBuffers,
-               Counter _maxMisses,
-               std::vector<Range<Addr> > cpu_side_filter_ranges,
-               std::vector<Range<Addr> > mem_side_filter_ranges)
-            : hitLatency(_hitLatency), blkSize(_blkSize),
-              numMSHRs(_numMSHRs), numTargets(_numTargets),
-              numWriteBuffers(_numWriteBuffers), maxMisses(_maxMisses),
-              cpuSideFilterRanges(cpu_side_filter_ranges),
-              memSideFilterRanges(mem_side_filter_ranges)
-        {
-        }
-    };
-
-    /**
-     * Create and initialize a basic cache object.
-     * @param name The name of this cache.
-     * @param hier_params Pointer to the HierParams object for this hierarchy
-     * of this cache.
-     * @param params The parameter object for this BaseCache.
-     */
-    BaseCache(const std::string &name, Params &params);
-
-    ~BaseCache()
-    {
-    }
+    typedef BaseCacheParams Params;
+    BaseCache(const Params *p);
+    ~BaseCache() {}
 
     virtual void init();
 
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh
index 821fa9702..037afd6ac 100644
--- a/src/mem/cache/cache.hh
+++ b/src/mem/cache/cache.hh
@@ -202,34 +202,8 @@ class Cache : public BaseCache
     PacketPtr writebackBlk(BlkType *blk);
 
   public:
-
-    class Params
-    {
-      public:
-        TagStore *tags;
-        BaseCache::Params baseParams;
-        BasePrefetcher*prefetcher;
-        bool prefetchAccess;
-        const bool doFastWrites;
-        const bool prefetchMiss;
-
-        Params(TagStore *_tags,
-               BaseCache::Params params,
-               BasePrefetcher *_prefetcher,
-               bool prefetch_access, int hit_latency,
-               bool do_fast_writes,
-               bool prefetch_miss)
-            : tags(_tags),
-              baseParams(params),
-              prefetcher(_prefetcher), prefetchAccess(prefetch_access),
-              doFastWrites(do_fast_writes),
-              prefetchMiss(prefetch_miss)
-        {
-        }
-    };
-
     /** Instantiates a basic cache object. */
-    Cache(const std::string &_name, Params &params);
+    Cache(const Params *p, TagStore *tags, BasePrefetcher *prefetcher);
 
     virtual Port *getPort(const std::string &if_name, int idx = -1);
     virtual void deletePortRefs(Port *p);
diff --git a/src/mem/cache/cache_builder.cc b/src/mem/cache/cache_builder.cc
index 0f8b52af2..d67a9c9a4 100644
--- a/src/mem/cache/cache_builder.cc
+++ b/src/mem/cache/cache_builder.cc
@@ -95,12 +95,8 @@ using namespace TheISA;
         else {                                                          \
             BUILD_NULL_PREFETCHER(TAGS);                                \
         }                                                               \
-        Cache<TAGS>::Params params(tags, base_params,       \
-                                   pf, prefetch_access, latency,        \
-                                   true,                                \
-                                   prefetch_miss);                      \
-        Cache<TAGS> *retval =                                        \
-            new Cache<TAGS>(name, params);                              \
+        Cache<TAGS> *retval =                                           \
+            new Cache<TAGS>(this, tags, pf);                            \
         return retval;                                                  \
     } while (0)
 
@@ -178,54 +174,28 @@ using namespace TheISA;
 
 #if defined(USE_TAGGED)
 #define BUILD_TAGGED_PREFETCHER(t)                              \
-    pf = new TaggedPrefetcher(prefetcher_size,                  \
-                              !prefetch_past_page,              \
-                              prefetch_serial_squash,           \
-                              prefetch_cache_check_push,        \
-                              prefetch_data_accesses_only,      \
-                              prefetch_latency,                 \
-                              prefetch_degree)
+    pf = new TaggedPrefetcher(this)
 #else
 #define BUILD_TAGGED_PREFETCHER(t) BUILD_CACHE_PANIC("Tagged Prefetcher")
 #endif
 
 #if defined(USE_STRIDED)
 #define BUILD_STRIDED_PREFETCHER(t)                             \
-    pf = new StridePrefetcher(prefetcher_size,                  \
-                              !prefetch_past_page,              \
-                              prefetch_serial_squash,           \
-                              prefetch_cache_check_push,        \
-                              prefetch_data_accesses_only,      \
-                              prefetch_latency,                 \
-                              prefetch_degree,                  \
-                              prefetch_use_cpu_id)
+    pf = new StridePrefetcher(this)
 #else
 #define BUILD_STRIDED_PREFETCHER(t) BUILD_CACHE_PANIC("Stride Prefetcher")
 #endif
 
 #if defined(USE_GHB)
 #define BUILD_GHB_PREFETCHER(t)                         \
-    pf = new GHBPrefetcher(prefetcher_size,             \
-                           !prefetch_past_page,         \
-                           prefetch_serial_squash,      \
-                           prefetch_cache_check_push,   \
-                           prefetch_data_accesses_only, \
-                           prefetch_latency,            \
-                           prefetch_degree,             \
-                           prefetch_use_cpu_id)
+    pf = new GHBPrefetcher(this)
 #else
 #define BUILD_GHB_PREFETCHER(t) BUILD_CACHE_PANIC("GHB Prefetcher")
 #endif
 
 #if defined(USE_TAGGED)
 #define BUILD_NULL_PREFETCHER(t)                                \
-    pf = new TaggedPrefetcher(prefetcher_size,                  \
-                              !prefetch_past_page,              \
-                              prefetch_serial_squash,           \
-                              prefetch_cache_check_push,        \
-                              prefetch_data_accesses_only,      \
-                              prefetch_latency,                 \
-                              prefetch_degree)
+    pf = new TaggedPrefetcher(this)
 #else
 #define BUILD_NULL_PREFETCHER(t) BUILD_CACHE_PANIC("NULL Prefetcher (uses Tagged)")
 #endif
@@ -238,12 +208,6 @@ BaseCacheParams::create()
         subblock_size = block_size;
     }
 
-    // Build BaseCache param object
-    BaseCache::Params base_params(latency, block_size,
-                                  mshrs, tgts_per_mshr, write_buffers,
-                                  max_miss_count, cpu_side_filter_ranges,
-                                  mem_side_filter_ranges);
-
     //Warnings about prefetcher policy
     if (prefetch_policy == Enums::none) {
         if (prefetch_miss || prefetch_access)
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index f9a007c93..34084c8dc 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -50,22 +50,21 @@
 
 
 template<class TagStore>
-Cache<TagStore>::Cache(const std::string &_name,
-                       Cache<TagStore>::Params &params)
-    : BaseCache(_name, params.baseParams),
-      prefetchAccess(params.prefetchAccess),
-      tags(params.tags),
-      prefetcher(params.prefetcher),
-      doFastWrites(params.doFastWrites),
-      prefetchMiss(params.prefetchMiss)
+Cache<TagStore>::Cache(const Params *p, TagStore *tags, BasePrefetcher *pf)
+    : BaseCache(p),
+      prefetchAccess(p->prefetch_access),
+      tags(tags),
+      prefetcher(pf),
+      doFastWrites(true),
+      prefetchMiss(p->prefetch_miss)
 {
     tempBlock = new BlkType();
     tempBlock->data = new uint8_t[blkSize];
 
-    cpuSidePort = new CpuSidePort(_name + "-cpu_side_port", this,
-            params.baseParams.cpuSideFilterRanges);
-    memSidePort = new MemSidePort(_name + "-mem_side_port", this,
-            params.baseParams.memSideFilterRanges);
+    cpuSidePort = new CpuSidePort(p->name + "-cpu_side_port", this,
+            p->cpu_side_filter_ranges);
+    memSidePort = new MemSidePort(p->name + "-mem_side_port", this,
+            p->mem_side_filter_ranges);
     cpuSidePort->setOtherPort(memSidePort);
     memSidePort->setOtherPort(cpuSidePort);
 
diff --git a/src/mem/cache/prefetch/base_prefetcher.cc b/src/mem/cache/prefetch/base_prefetcher.cc
index 378363665..1af900849 100644
--- a/src/mem/cache/prefetch/base_prefetcher.cc
+++ b/src/mem/cache/prefetch/base_prefetcher.cc
@@ -39,10 +39,11 @@
 #include "mem/request.hh"
 #include <list>
 
-BasePrefetcher::BasePrefetcher(int size, bool pageStop, bool serialSquash,
-                               bool cacheCheckPush, bool onlyData)
-    :size(size), pageStop(pageStop), serialSquash(serialSquash),
-     cacheCheckPush(cacheCheckPush), only_data(onlyData)
+BasePrefetcher::BasePrefetcher(const BaseCacheParams *p)
+    : size(p->prefetcher_size), pageStop(!p->prefetch_past_page),
+      serialSquash(p->prefetch_serial_squash),
+      cacheCheckPush(p->prefetch_cache_check_push),
+      only_data(p->prefetch_data_accesses_only)
 {
 }
 
diff --git a/src/mem/cache/prefetch/base_prefetcher.hh b/src/mem/cache/prefetch/base_prefetcher.hh
index 2780f5e5a..1515d8a93 100644
--- a/src/mem/cache/prefetch/base_prefetcher.hh
+++ b/src/mem/cache/prefetch/base_prefetcher.hh
@@ -40,6 +40,7 @@
 
 #include "base/statistics.hh"
 #include "mem/packet.hh"
+#include "params/BaseCache.hh"
 
 class BaseCache;
 
@@ -89,8 +90,7 @@ class BasePrefetcher
     void regStats(const std::string &name);
 
   public:
-    BasePrefetcher(int numMSHRS, bool pageStop, bool serialSquash,
-                   bool cacheCheckPush, bool onlyData);
+    BasePrefetcher(const BaseCacheParams *p);
 
     virtual ~BasePrefetcher() {}
 
diff --git a/src/mem/cache/prefetch/ghb_prefetcher.hh b/src/mem/cache/prefetch/ghb_prefetcher.hh
index f31b56dcf..c44e9c456 100644
--- a/src/mem/cache/prefetch/ghb_prefetcher.hh
+++ b/src/mem/cache/prefetch/ghb_prefetcher.hh
@@ -51,12 +51,9 @@ class GHBPrefetcher : public BasePrefetcher
 
   public:
 
-    GHBPrefetcher(int size, bool pageStop, bool serialSquash,
-                  bool cacheCheckPush, bool onlyData,
-                  Tick latency, int degree, bool useCPUId)
-        : BasePrefetcher(size, pageStop, serialSquash,
-                         cacheCheckPush, onlyData),
-          latency(latency), degree(degree), useCPUId(useCPUId)
+    GHBPrefetcher(const BaseCacheParams *p)
+        : BasePrefetcher(p), latency(p->prefetch_latency),
+          degree(p->prefetch_degree), useCPUId(p->prefetch_use_cpu_id)
     {
     }
 
diff --git a/src/mem/cache/prefetch/stride_prefetcher.hh b/src/mem/cache/prefetch/stride_prefetcher.hh
index 831e60fb4..4d5ac2f0d 100644
--- a/src/mem/cache/prefetch/stride_prefetcher.hh
+++ b/src/mem/cache/prefetch/stride_prefetcher.hh
@@ -68,12 +68,9 @@ class StridePrefetcher : public BasePrefetcher
 
   public:
 
-    StridePrefetcher(int size, bool pageStop, bool serialSquash,
-                     bool cacheCheckPush, bool onlyData,
-                     Tick latency, int degree, bool useCPUId)
-        : BasePrefetcher(size, pageStop, serialSquash,
-                         cacheCheckPush, onlyData),
-          latency(latency), degree(degree), useCPUId(useCPUId)
+    StridePrefetcher(const BaseCacheParams *p)
+        : BasePrefetcher(p), latency(p->prefetch_latency),
+          degree(p->prefetch_degree), useCPUId(p->prefetch_use_cpu_id)
     {
     }
 
diff --git a/src/mem/cache/prefetch/tagged_prefetcher.cc b/src/mem/cache/prefetch/tagged_prefetcher.cc
index bc1fa46b9..b25cb5054 100644
--- a/src/mem/cache/prefetch/tagged_prefetcher.cc
+++ b/src/mem/cache/prefetch/tagged_prefetcher.cc
@@ -36,13 +36,9 @@
 #include "arch/isa_traits.hh"
 #include "mem/cache/prefetch/tagged_prefetcher.hh"
 
-TaggedPrefetcher::
-TaggedPrefetcher(int size, bool pageStop, bool serialSquash,
-                 bool cacheCheckPush, bool onlyData,
-                 Tick latency, int degree)
-    : BasePrefetcher(size, pageStop, serialSquash,
-                     cacheCheckPush, onlyData),
-      latency(latency), degree(degree)
+TaggedPrefetcher::TaggedPrefetcher(const BaseCacheParams *p)
+    : BasePrefetcher(p),
+      latency(p->prefetch_latency), degree(p->prefetch_degree)
 {
 }
 
diff --git a/src/mem/cache/prefetch/tagged_prefetcher.hh b/src/mem/cache/prefetch/tagged_prefetcher.hh
index b9d228aba..f3094445f 100644
--- a/src/mem/cache/prefetch/tagged_prefetcher.hh
+++ b/src/mem/cache/prefetch/tagged_prefetcher.hh
@@ -47,9 +47,7 @@ class TaggedPrefetcher : public BasePrefetcher
 
   public:
 
-    TaggedPrefetcher(int size, bool pageStop, bool serialSquash,
-                     bool cacheCheckPush, bool onlyData,
-                     Tick latency, int degree);
+    TaggedPrefetcher(const BaseCacheParams *p);
 
     ~TaggedPrefetcher() {}
 
diff --git a/src/mem/cache/tags/repl/gen.cc b/src/mem/cache/tags/repl/gen.cc
index 7d1566300..bc4e6b86a 100644
--- a/src/mem/cache/tags/repl/gen.cc
+++ b/src/mem/cache/tags/repl/gen.cc
@@ -44,19 +44,11 @@
 
 using namespace std;
 
-GenRepl::GenRepl(const string &_name,
-                 int _num_pools,
-                 int _fresh_res,
-                 int _pool_res) // fix this, should be set by cache
-    : Repl(_name)
+GenRepl::GenRepl(const Params *p) // fix this, should be set by cache
+    : Repl(p), num_pools(p->num_pools), fresh_res(p->fresh_res),
+      pool_res(p->pool_res), num_entries(0), num_pool_entries(0), misses(0),
+      pools(pools = new GenPool[num_pools+1])
 {
-    num_pools = _num_pools;
-    fresh_res = _fresh_res;
-    pool_res = _pool_res;
-    num_entries = 0;
-    num_pool_entries = 0;
-    misses = 0;
-    pools = new GenPool[num_pools+1];
 }
 
 GenRepl::~GenRepl()
@@ -250,5 +242,5 @@ GenRepl::findTagPtr(unsigned long index)
 GenRepl *
 GenReplParams::create()
 {
-    return new GenRepl(name, num_pools, fresh_res, pool_res);
+    return new GenRepl(this);
 }
diff --git a/src/mem/cache/tags/repl/gen.hh b/src/mem/cache/tags/repl/gen.hh
index c1ceb3f4e..09a8d5995 100644
--- a/src/mem/cache/tags/repl/gen.hh
+++ b/src/mem/cache/tags/repl/gen.hh
@@ -40,6 +40,7 @@
 
 #include "base/statistics.hh"
 #include "mem/cache/tags/repl/repl.hh"
+#include "params/GenRepl.hh"
 
 /**
  * Generational Replacement entry.
@@ -139,8 +140,6 @@ class GenPool
 class GenRepl : public Repl
 {
   public:
-    /** The array of pools. */
-    GenPool *pools;
     /** The number of pools. */
     int num_pools;
     /** The amount of time to stay in the fresh pool. */
@@ -153,6 +152,8 @@ class GenRepl : public Repl
     int num_pool_entries;
     /** The number of misses. Used as the internal time. */
     Tick misses;
+    /** The array of pools. */
+    GenPool *pools;
 
     // Statistics
 
@@ -170,15 +171,8 @@ class GenRepl : public Repl
      * @}
      */
 
-    /**
-     * Constructs and initializes this replacement policy.
-     * @param name The name of the policy.
-     * @param num_pools The number of pools to use.
-     * @param fresh_res The amount of time to wait in the fresh pool.
-     * @param pool_res The amount of time to wait in the normal pools.
-     */
-    GenRepl(const std::string &name, int num_pools,
-            int fresh_res, int pool_res);
+    typedef GenReplParams Params;
+    GenRepl(const Params *p);
 
     /**
      * Destructor.
diff --git a/src/mem/cache/tags/repl/repl.hh b/src/mem/cache/tags/repl/repl.hh
index 7c289a5c1..cdb5ae4b8 100644
--- a/src/mem/cache/tags/repl/repl.hh
+++ b/src/mem/cache/tags/repl/repl.hh
@@ -58,12 +58,8 @@ class Repl : public SimObject
     /** Pointer to the IIC using this policy. */
     IIC *iic;
 
-    /**
-     * Construct and initialize this polixy.
-     * @param name The instance name of this policy.
-     */
-    Repl (const std::string &name)
-        : SimObject(name)
+    Repl (const Params *params)
+        : SimObject(params)
     {
         iic = NULL;
     }
diff --git a/src/mem/mem_object.cc b/src/mem/mem_object.cc
index b40709eb2..ce2a1107e 100644
--- a/src/mem/mem_object.cc
+++ b/src/mem/mem_object.cc
@@ -35,9 +35,12 @@ MemObject::MemObject(const Params *params)
 {
 }
 
-MemObject::MemObject(const std::string &name)
-    : SimObject(name)
+MemObjectParams *
+MemObject::makeParams(const std::string &name)
 {
+    MemObjectParams *params = new MemObjectParams;
+    params->name = name;
+    return params;
 }
 
 void
diff --git a/src/mem/mem_object.hh b/src/mem/mem_object.hh
index 79e555cda..33b56dfd4 100644
--- a/src/mem/mem_object.hh
+++ b/src/mem/mem_object.hh
@@ -49,7 +49,6 @@ class MemObject : public SimObject
   public:
     typedef MemObjectParams Params;
     MemObject(const Params *params);
-    MemObject(const std::string &name);
 
     const Params *
     params() const
@@ -57,6 +56,10 @@ class MemObject : public SimObject
         return dynamic_cast<const Params *>(_params);
     }
 
+  protected:
+    // static: support for old-style constructors (call manually)
+    static Params *makeParams(const std::string &name);
+
   public:
     /** Additional function to return the Port of a memory object. */
     virtual Port *getPort(const std::string &if_name, int idx = -1) = 0;