misc: Add explicit overrides and fix other clang >= 3.5 issues

This patch adds explicit overrides as this is now required when using
"-Wall" with clang >= 3.5, the latter now part of the most recent
XCode. The patch consequently removes "virtual" for those methods
where "override" is added. The latter should be enough of an
indication.

As part of this patch, a few minor issues that clang >= 3.5 complains
about are also resolved (unused methods and variables).

15 files changed, 65 insertions, 68 deletions

diff --git a/src/mem/abstract_mem.hh b/src/mem/abstract_mem.hh
index 6dbc79ea0..8ab28770d 100644
--- a/src/mem/abstract_mem.hh
+++ b/src/mem/abstract_mem.hh
@@ -197,7 +197,7 @@ class AbstractMemory : public MemObject
     /**
      * Initialise this memory.
      */
-    void init();
+    void init() override;
 
     /**
      * See if this is a null memory that should never store data and
@@ -304,7 +304,7 @@ class AbstractMemory : public MemObject
     /**
      * Register Statistics
      */
-    virtual void regStats();
+    void regStats() override;
 
 };
 
diff --git a/src/mem/cache/cache.hh b/src/mem/cache/cache.hh
index 0ee0696d8..ec436201b 100644
--- a/src/mem/cache/cache.hh
+++ b/src/mem/cache/cache.hh
@@ -334,9 +334,9 @@ class Cache : public BaseCache
     PacketPtr cleanEvictBlk(CacheBlk *blk);
 
 
-    void memWriteback();
-    void memInvalidate();
-    bool isDirty() const;
+    void memWriteback() override;
+    void memInvalidate() override;
+    bool isDirty() const override;
 
     /**
      * Cache block visitor that writes back dirty cache blocks using
@@ -410,11 +410,11 @@ class Cache : public BaseCache
         return tags->findBlock(addr, is_secure);
     }
 
-    bool inCache(Addr addr, bool is_secure) const {
+    bool inCache(Addr addr, bool is_secure) const override {
         return (tags->findBlock(addr, is_secure) != 0);
     }
 
-    bool inMissQueue(Addr addr, bool is_secure) const {
+    bool inMissQueue(Addr addr, bool is_secure) const override {
         return (mshrQueue.findMatch(addr, is_secure) != 0);
     }
 
@@ -430,7 +430,7 @@ class Cache : public BaseCache
     /** Non-default destructor is needed to deallocate memory. */
     virtual ~Cache();
 
-    void regStats();
+    void regStats() override;
 
     /** serialize the state of the caches
      * We currently don't support checkpointing cache state, so this panics.
diff --git a/src/mem/cache/tags/base_set_assoc.hh b/src/mem/cache/tags/base_set_assoc.hh
index e415603d9..910d44b36 100644
--- a/src/mem/cache/tags/base_set_assoc.hh
+++ b/src/mem/cache/tags/base_set_assoc.hh
@@ -152,7 +152,7 @@ public:
      * @return The number of sets.
      */
     unsigned
-    getNumSets() const
+    getNumSets() const override
     {
         return numSets;
     }
@@ -162,7 +162,7 @@ public:
      * @return The number of ways.
      */
     unsigned
-    getNumWays() const
+    getNumWays() const override
     {
         return assoc;
     }
@@ -173,13 +173,13 @@ public:
      * @param way The way of the block.
      * @return The cache block.
      */
-    CacheBlk *findBlockBySetAndWay(int set, int way) const;
+    CacheBlk *findBlockBySetAndWay(int set, int way) const override;
 
     /**
      * Invalidate the given block.
      * @param blk The block to invalidate.
      */
-    void invalidate(CacheBlk *blk)
+    void invalidate(CacheBlk *blk) override
     {
         assert(blk);
         assert(blk->isValid());
@@ -203,7 +203,7 @@ public:
      * @return Pointer to the cache block if found.
      */
     CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat,
-                                 int context_src)
+                          int context_src) override
     {
         Addr tag = extractTag(addr);
         int set = extractSet(addr);
@@ -242,7 +242,7 @@ public:
      * @param asid The address space ID.
      * @return Pointer to the cache block if found.
      */
-    CacheBlk* findBlock(Addr addr, bool is_secure) const;
+    CacheBlk* findBlock(Addr addr, bool is_secure) const override;
 
     /**
      * Find an invalid block to evict for the address provided.
@@ -251,7 +251,7 @@ public:
      * @param addr The addr to a find a replacement candidate for.
      * @return The candidate block.
      */
-    CacheBlk* findVictim(Addr addr)
+    CacheBlk* findVictim(Addr addr) override
     {
         BlkType *blk = NULL;
         int set = extractSet(addr);
@@ -271,7 +271,7 @@ public:
      * @param pkt Packet holding the address to update
      * @param blk The block to update.
      */
-     void insertBlock(PacketPtr pkt, CacheBlk *blk)
+     void insertBlock(PacketPtr pkt, CacheBlk *blk) override
      {
          Addr addr = pkt->getAddr();
          MasterID master_id = pkt->req->masterId();
@@ -324,7 +324,7 @@ public:
      * Limit the allocation for the cache ways.
      * @param ways The maximum number of ways available for replacement.
      */
-    virtual void setWayAllocationMax(int ways)
+    virtual void setWayAllocationMax(int ways) override
     {
         fatal_if(ways < 1, "Allocation limit must be greater than zero");
         allocAssoc = ways;
@@ -334,7 +334,7 @@ public:
      * Get the way allocation mask limit.
      * @return The maximum number of ways available for replacement.
      */
-    virtual int getWayAllocationMax() const
+    virtual int getWayAllocationMax() const override
     {
         return allocAssoc;
     }
@@ -344,7 +344,7 @@ public:
      * @param addr The address to get the tag from.
      * @return The tag of the address.
      */
-    Addr extractTag(Addr addr) const
+    Addr extractTag(Addr addr) const override
     {
         return (addr >> tagShift);
     }
@@ -354,7 +354,7 @@ public:
      * @param addr The address to get the set from.
      * @return The set index of the address.
      */
-    int extractSet(Addr addr) const
+    int extractSet(Addr addr) const override
     {
         return ((addr >> setShift) & setMask);
     }
@@ -375,7 +375,7 @@ public:
      * @param set The set of the block.
      * @return The block address.
      */
-    Addr regenerateBlkAddr(Addr tag, unsigned set) const
+    Addr regenerateBlkAddr(Addr tag, unsigned set) const override
     {
         return ((tag << tagShift) | ((Addr)set << setShift));
     }
@@ -383,17 +383,17 @@ public:
     /**
      * Called at end of simulation to complete average block reference stats.
      */
-    virtual void cleanupRefs();
+    void cleanupRefs() override;
 
     /**
      * Print all tags used
      */
-    virtual std::string print() const;
+    std::string print() const override;
 
     /**
      * Called prior to dumping stats to compute task occupancy
      */
-    virtual void computeStats();
+    void computeStats() override;
 
     /**
      * Visit each block in the tag store and apply a visitor to the
diff --git a/src/mem/cache/tags/fa_lru.hh b/src/mem/cache/tags/fa_lru.hh
index 1728ee48a..2c34be08f 100644
--- a/src/mem/cache/tags/fa_lru.hh
+++ b/src/mem/cache/tags/fa_lru.hh
@@ -168,13 +168,13 @@ public:
      * Register the stats for this object.
      * @param name The name to prepend to the stats name.
      */
-    void regStats();
+    void regStats() override;
 
     /**
      * Invalidate a cache block.
      * @param blk The block to invalidate.
      */
-    void invalidate(CacheBlk *blk);
+    void invalidate(CacheBlk *blk) override;
 
     /**
      * Access block and update replacement data.  May not succeed, in which case
@@ -195,7 +195,7 @@ public:
      * Just a wrapper of above function to conform with the base interface.
      */
     CacheBlk* accessBlock(Addr addr, bool is_secure, Cycles &lat,
-                          int context_src);
+                          int context_src) override;
 
     /**
      * Find the block in the cache, do not update the replacement data.
@@ -204,16 +204,16 @@ public:
      * @param asid The address space ID.
      * @return Pointer to the cache block.
      */
-    CacheBlk* findBlock(Addr addr, bool is_secure) const;
+    CacheBlk* findBlock(Addr addr, bool is_secure) const override;
 
     /**
      * Find a replacement block for the address provided.
      * @param pkt The request to a find a replacement candidate for.
      * @return The block to place the replacement in.
      */
-    CacheBlk* findVictim(Addr addr);
+    CacheBlk* findVictim(Addr addr) override;
 
-    void insertBlock(PacketPtr pkt, CacheBlk *blk);
+    void insertBlock(PacketPtr pkt, CacheBlk *blk) override;
 
     /**
      * Return the block size of this cache.
@@ -240,7 +240,7 @@ public:
      * @return The number of sets.
      */
     unsigned
-    getNumSets() const
+    getNumSets() const override
     {
         return 1;
     }
@@ -250,7 +250,7 @@ public:
      * @return The number of ways.
      */
     unsigned
-    getNumWays() const
+    getNumWays() const override
     {
         return numBlocks;
     }
@@ -261,7 +261,7 @@ public:
      * @param way The way of the block.
      * @return The cache block.
      */
-    CacheBlk* findBlockBySetAndWay(int set, int way) const;
+    CacheBlk* findBlockBySetAndWay(int set, int way) const override;
 
     /**
      * Align an address to the block size.
@@ -279,7 +279,7 @@ public:
      * @param addr The address to get the tag from.
      * @return The tag.
      */
-    Addr extractTag(Addr addr) const
+    Addr extractTag(Addr addr) const override
     {
         return blkAlign(addr);
     }
@@ -289,7 +289,7 @@ public:
      * @param addr The address to get the set from.
      * @return 0.
      */
-    int extractSet(Addr addr) const
+    int extractSet(Addr addr) const override
     {
         return 0;
     }
@@ -300,7 +300,7 @@ public:
      * @param set The set the block belongs to.
      * @return the block address.
      */
-    Addr regenerateBlkAddr(Addr tag, unsigned set) const
+    Addr regenerateBlkAddr(Addr tag, unsigned set) const override
     {
         return (tag);
     }
@@ -308,7 +308,7 @@ public:
     /**
      * @todo Implement as in lru. Currently not used
      */
-    virtual std::string print() const { return ""; }
+    virtual std::string print() const override { return ""; }
 
     /**
      * Visit each block in the tag store and apply a visitor to the
diff --git a/src/mem/dram_ctrl.hh b/src/mem/dram_ctrl.hh
index a7f3e5602..617c94914 100644
--- a/src/mem/dram_ctrl.hh
+++ b/src/mem/dram_ctrl.hh
@@ -868,14 +868,14 @@ class DRAMCtrl : public AbstractMemory
 
   public:
 
-    void regStats();
+    void regStats() override;
 
     DRAMCtrl(const DRAMCtrlParams* p);
 
     DrainState drain() override;
 
     virtual BaseSlavePort& getSlavePort(const std::string& if_name,
-                                        PortID idx = InvalidPortID);
+                                        PortID idx = InvalidPortID) override;
 
     virtual void init() override;
     virtual void startup() override;
diff --git a/src/mem/dramsim2.hh b/src/mem/dramsim2.hh
index 77486de88..e57479247 100644
--- a/src/mem/dramsim2.hh
+++ b/src/mem/dramsim2.hh
@@ -192,10 +192,10 @@ class DRAMSim2 : public AbstractMemory
     DrainState drain() override;
 
     virtual BaseSlavePort& getSlavePort(const std::string& if_name,
-                                        PortID idx = InvalidPortID);
+                                        PortID idx = InvalidPortID) override;
 
-    virtual void init();
-    virtual void startup();
+    void init() override;
+    void startup() override;
 
   protected:
 
diff --git a/src/mem/page_table.hh b/src/mem/page_table.hh
index 7dcbbd65a..47c7c5491 100644
--- a/src/mem/page_table.hh
+++ b/src/mem/page_table.hh
@@ -211,14 +211,14 @@ class FuncPageTable : public PageTableBase
 
     ~FuncPageTable();
 
-    void initState(ThreadContext* tc)
+    void initState(ThreadContext* tc) override
     {
     }
 
     void map(Addr vaddr, Addr paddr, int64_t size,
-             uint64_t flags = 0);
-    void remap(Addr vaddr, int64_t size, Addr new_vaddr);
-    void unmap(Addr vaddr, int64_t size);
+             uint64_t flags = 0) override;
+    void remap(Addr vaddr, int64_t size, Addr new_vaddr) override;
+    void unmap(Addr vaddr, int64_t size) override;
 
     /**
      * Check if any pages in a region are already allocated
@@ -226,14 +226,14 @@ class FuncPageTable : public PageTableBase
      * @param size The length of the region.
      * @return True if no pages in the region are mapped.
      */
-    bool isUnmapped(Addr vaddr, int64_t size);
+    bool isUnmapped(Addr vaddr, int64_t size) override;
 
     /**
      * Lookup function
      * @param vaddr The virtual address.
      * @return entry The page table entry corresponding to vaddr.
      */
-    bool lookup(Addr vaddr, TheISA::TlbEntry &entry);
+    bool lookup(Addr vaddr, TheISA::TlbEntry &entry) override;
 
     void serialize(CheckpointOut &cp) const override;
     void unserialize(CheckpointIn &cp) override;
diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/GarnetLink_d.py b/src/mem/ruby/network/garnet/fixed-pipeline/GarnetLink_d.py
index 14c3f543c..4a957b66e 100644
--- a/src/mem/ruby/network/garnet/fixed-pipeline/GarnetLink_d.py
+++ b/src/mem/ruby/network/garnet/fixed-pipeline/GarnetLink_d.py
@@ -42,8 +42,6 @@ class NetworkLink_d(ClockedObject):
                               "virtual channels per virtual network")
     virt_nets = Param.Int(Parent.number_of_virtual_networks,
                           "number of virtual networks")
-    channel_width = Param.Int(Parent.bandwidth_factor,
-                              "channel width == bw factor")
 
 class CreditLink_d(NetworkLink_d):
     type = 'CreditLink_d'
diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.cc b/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.cc
index 8d9acd433..60c7ca3f4 100644
--- a/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.cc
+++ b/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.cc
@@ -33,7 +33,7 @@
 
 NetworkLink_d::NetworkLink_d(const Params *p)
     : ClockedObject(p), Consumer(this), m_id(p->link_id),
-      m_latency(p->link_latency),  channel_width(p->channel_width),
+      m_latency(p->link_latency),
       linkBuffer(new flitBuffer_d()), link_consumer(nullptr),
       link_srcQueue(nullptr), m_link_utilized(0),
       m_vc_load(p->vcs_per_vnet * p->virt_nets)
diff --git a/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh b/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh
index ad9fef2f4..be937f093 100644
--- a/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh
+++ b/src/mem/ruby/network/garnet/fixed-pipeline/NetworkLink_d.hh
@@ -69,7 +69,6 @@ class NetworkLink_d : public ClockedObject, public Consumer
   private:
     const int m_id;
     const Cycles m_latency;
-    const int channel_width;
 
     flitBuffer_d *linkBuffer;
     Consumer *link_consumer;
diff --git a/src/mem/ruby/structures/RubyMemoryControl.hh b/src/mem/ruby/structures/RubyMemoryControl.hh
index 75fe71dfb..cd777f5e7 100644
--- a/src/mem/ruby/structures/RubyMemoryControl.hh
+++ b/src/mem/ruby/structures/RubyMemoryControl.hh
@@ -53,15 +53,15 @@ class RubyMemoryControl : public AbstractMemory, public Consumer
   public:
     typedef RubyMemoryControlParams Params;
     RubyMemoryControl(const Params *p);
-    void init();
+    void init() override;
     void reset();
 
     ~RubyMemoryControl();
 
     virtual BaseSlavePort& getSlavePort(const std::string& if_name,
-                                        PortID idx = InvalidPortID);
+                                        PortID idx = InvalidPortID) override;
     DrainState drain() override;
-    void wakeup();
+    void wakeup() override;
 
     void setDescription(const std::string& name) { m_description = name; };
     std::string getDescription() { return m_description; };
@@ -72,8 +72,8 @@ class RubyMemoryControl : public AbstractMemory, public Consumer
     void enqueueMemRef(MemoryNode *memRef);
     bool areNSlotsAvailable(int n) { return true; };  // infinite queue length
 
-    void print(std::ostream& out) const;
-    void regStats();
+    void print(std::ostream& out) const override;
+    void regStats() override;
 
     const int getBank(const Addr addr) const;
     const int getRank(const Addr addr) const;
diff --git a/src/mem/ruby/system/DMASequencer.hh b/src/mem/ruby/system/DMASequencer.hh
index 1d5451f6e..34f9be34c 100644
--- a/src/mem/ruby/system/DMASequencer.hh
+++ b/src/mem/ruby/system/DMASequencer.hh
@@ -60,7 +60,7 @@ class DMASequencer : public MemObject
   public:
     typedef DMASequencerParams Params;
     DMASequencer(const Params *);
-    void init();
+    void init() override;
     RubySystem *m_ruby_system;
 
   public:
@@ -95,7 +95,7 @@ class DMASequencer : public MemObject
     };
 
     BaseSlavePort &getSlavePort(const std::string &if_name,
-                                PortID idx = InvalidPortID);
+                                PortID idx = InvalidPortID) override;
 
     /* external interface */
     RequestStatus makeRequest(PacketPtr pkt);
diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh
index 98fab8c4e..58d2558dd 100644
--- a/src/mem/ruby/system/RubyPort.hh
+++ b/src/mem/ruby/system/RubyPort.hh
@@ -143,12 +143,12 @@ class RubyPort : public MemObject
     RubyPort(const Params *p);
     virtual ~RubyPort() {}
 
-    void init();
+    void init() override;
 
     BaseMasterPort &getMasterPort(const std::string &if_name,
-                                  PortID idx = InvalidPortID);
+                                  PortID idx = InvalidPortID) override;
     BaseSlavePort &getSlavePort(const std::string &if_name,
-                                PortID idx = InvalidPortID);
+                                PortID idx = InvalidPortID) override;
 
     virtual RequestStatus makeRequest(PacketPtr pkt) = 0;
     virtual int outstandingCount() const = 0;
diff --git a/src/mem/ruby/system/RubySystem.hh b/src/mem/ruby/system/RubySystem.hh
index 23974e924..e396dce64 100644
--- a/src/mem/ruby/system/RubySystem.hh
+++ b/src/mem/ruby/system/RubySystem.hh
@@ -89,16 +89,16 @@ class RubySystem : public ClockedObject
         return m_profiler;
     }
 
-    void regStats() { m_profiler->regStats(name()); }
+    void regStats() override { m_profiler->regStats(name()); }
     void collateStats() { m_profiler->collateStats(); }
-    void resetStats();
+    void resetStats() override;
 
-    void memWriteback();
+    void memWriteback() override;
     void serialize(CheckpointOut &cp) const override;
     void unserialize(CheckpointIn &cp) override;
     void drainResume() override;
     void process();
-    void startup();
+    void startup() override;
     bool functionalRead(Packet *ptr);
     bool functionalWrite(Packet *ptr);
 
diff --git a/src/mem/simple_mem.hh b/src/mem/simple_mem.hh
index c5b932bf0..35d8aeafb 100644
--- a/src/mem/simple_mem.hh
+++ b/src/mem/simple_mem.hh
@@ -188,8 +188,8 @@ class SimpleMemory : public AbstractMemory
     DrainState drain() override;
 
     BaseSlavePort& getSlavePort(const std::string& if_name,
-                                PortID idx = InvalidPortID);
-    void init();
+                                PortID idx = InvalidPortID) override;
+    void init() override;
 
   protected: