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authorAndreas Hansson <andreas.hansson@arm.com>2012-02-24 11:50:15 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2012-02-24 11:50:15 -0500
commit77878d0a87ee18709ca4d6459b8ae436cc101fa7 (patch)
tree2db1f5113fadae1d49d6ef5048f1706c1d31307c /src/mem
parent86c2aad482df4bf56977bf1a098d2dd01c641bfd (diff)
downloadgem5-77878d0a87ee18709ca4d6459b8ae436cc101fa7.tar.xz
MEM: Prepare mport for master/slave split
This patch simplifies the mport in preparation for a split into a master and slave role for the message ports. In particular, sendMessageAtomic was only used in a single location and similarly so sendMessageTiming. The affected interrupt device is updated accordingly.
Diffstat (limited to 'src/mem')
-rw-r--r--src/mem/mport.cc38
-rw-r--r--src/mem/mport.hh11
2 files changed, 19 insertions, 30 deletions
diff --git a/src/mem/mport.cc b/src/mem/mport.cc
index 80393c81e..2c57030b1 100644
--- a/src/mem/mport.cc
+++ b/src/mem/mport.cc
@@ -1,4 +1,16 @@
/*
+ * Copyright (c) 2012 ARM Limited
+ * All rights reserved
+ *
+ * The license below extends only to copyright in the software and shall
+ * not be construed as granting a license to any other intellectual
+ * property including but not limited to intellectual property relating
+ * to a hardware implementation of the functionality of the software
+ * licensed hereunder. You may use the software subject to the license
+ * terms below provided that you ensure that this notice is replicated
+ * unmodified and in its entirety in all distributions of the software,
+ * modified or unmodified, in source code or in binary form.
+ *
* Copyright (c) 2008 The Regents of The University of Michigan
* All rights reserved.
*
@@ -34,30 +46,14 @@ Tick
MessagePort::recvAtomic(PacketPtr pkt)
{
if (pkt->cmd == MemCmd::MessageReq) {
- // We received a message.
return recvMessage(pkt);
} else if (pkt->cmd == MemCmd::MessageResp) {
+ // normally we would never see responses in recvAtomic, but
+ // since the timing port uses recvAtomic to implement
+ // recvTiming we have to deal with both cases
return recvResponse(pkt);
- } else if (pkt->wasNacked()) {
- return recvNack(pkt);
- } else if (pkt->isError()) {
- panic("Packet is error.\n");
} else {
- panic("Unexpected memory command %s.\n", pkt->cmd.toString());
+ panic("%s received unexpected atomic command %s from %s.\n",
+ name(), pkt->cmd.toString(), getPeer()->name());
}
}
-
-void
-MessagePort::sendMessageTiming(PacketPtr pkt, Tick latency)
-{
- schedSendTiming(pkt, curTick() + latency);
-}
-
-Tick
-MessagePort::sendMessageAtomic(PacketPtr pkt)
-{
- Tick latency = sendAtomic(pkt);
- assert(pkt->isResponse());
- latency += recvResponse(pkt);
- return latency;
-}
diff --git a/src/mem/mport.hh b/src/mem/mport.hh
index 5975f89f0..062dcca0b 100644
--- a/src/mem/mport.hh
+++ b/src/mem/mport.hh
@@ -59,6 +59,8 @@ class MessagePort : public SimpleTimingPort
Tick recvAtomic(PacketPtr pkt);
+ protected:
+
virtual Tick recvMessage(PacketPtr pkt) = 0;
// Accept and ignore responses.
@@ -66,15 +68,6 @@ class MessagePort : public SimpleTimingPort
{
return 0;
}
-
- // Since by default we're assuming everything we send is accepted, panic.
- virtual Tick recvNack(PacketPtr pkt)
- {
- panic("Unhandled message nack.\n");
- }
-
- void sendMessageTiming(PacketPtr pkt, Tick latency);
- Tick sendMessageAtomic(PacketPtr pkt);
};
#endif