sim: Decouple draining from the SimObject hierarchy

Draining is currently done by traversing the SimObject graph and
calling drain()/drainResume() on the SimObjects. This is not ideal
when non-SimObjects (e.g., ports) need draining since this means that
SimObjects owning those objects need to be aware of this.

This changeset moves the responsibility for finding objects that need
draining from SimObjects and the Python-side of the simulator to the
DrainManager. The DrainManager now maintains a set of all objects that
need draining. To reduce the overhead in classes owning non-SimObjects
that need draining, objects inheriting from Drainable now
automatically register with the DrainManager. If such an object is
destroyed, it is automatically unregistered. This means that drain()
and drainResume() should never be called directly on a Drainable
object.

While implementing the new functionality, the DrainManager has now
been made thread safe. In practice, this means that it takes a lock
whenever it manipulates the set of Drainable objects since SimObjects
in different threads may create Drainable objects
dynamically. Similarly, the drain counter is now an atomic_uint, which
ensures that it is manipulated correctly when objects signal that they
are done draining.

A nice side effect of these changes is that it makes the drain state
changes stricter, which the simulation scripts can exploit to avoid
redundant drains.

12 files changed, 8 insertions, 115 deletions

diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc
index e58d5f6b9..c270d5b65 100644
--- a/src/mem/cache/base.cc
+++ b/src/mem/cache/base.cc
@@ -775,23 +775,6 @@ BaseCache::regStats()
 
 }
 
-unsigned int
-BaseCache::drain(DrainManager *dm)
-{
-    int count = memSidePort->drain(dm) + cpuSidePort->drain(dm) +
-        mshrQueue.drain(dm) + writeBuffer.drain(dm);
-
-    // Set status
-    if (count != 0) {
-        setDrainState(DrainState::Draining);
-        DPRINTF(Drain, "Cache not drained\n");
-        return count;
-    }
-
-    setDrainState(DrainState::Drained);
-    return 0;
-}
-
 BaseCache *
 BaseCacheParams::create()
 {
diff --git a/src/mem/cache/base.hh b/src/mem/cache/base.hh
index 6c87fad12..041b1f6a5 100644
--- a/src/mem/cache/base.hh
+++ b/src/mem/cache/base.hh
@@ -593,8 +593,6 @@ class BaseCache : public MemObject
         // interesting again.
     }
 
-    virtual unsigned int drain(DrainManager *dm);
-
     virtual bool inCache(Addr addr, bool is_secure) const = 0;
 
     virtual bool inMissQueue(Addr addr, bool is_secure) const = 0;
diff --git a/src/mem/coherent_xbar.cc b/src/mem/coherent_xbar.cc
index 7f1639e44..9e5407981 100644
--- a/src/mem/coherent_xbar.cc
+++ b/src/mem/coherent_xbar.cc
@@ -834,20 +834,6 @@ CoherentXBar::forwardFunctional(PacketPtr pkt, PortID exclude_slave_port_id)
     }
 }
 
-unsigned int
-CoherentXBar::drain(DrainManager *dm)
-{
-    // sum up the individual layers
-    unsigned int total = 0;
-    for (auto l: reqLayers)
-        total += l->drain(dm);
-    for (auto l: respLayers)
-        total += l->drain(dm);
-    for (auto l: snoopLayers)
-        total += l->drain(dm);
-    return total;
-}
-
 void
 CoherentXBar::regStats()
 {
diff --git a/src/mem/coherent_xbar.hh b/src/mem/coherent_xbar.hh
index 4b495ac2c..d431a1d24 100644
--- a/src/mem/coherent_xbar.hh
+++ b/src/mem/coherent_xbar.hh
@@ -396,8 +396,6 @@ class CoherentXBar : public BaseXBar
 
     virtual ~CoherentXBar();
 
-    unsigned int drain(DrainManager *dm);
-
     virtual void regStats();
 };
 
diff --git a/src/mem/dram_ctrl.cc b/src/mem/dram_ctrl.cc
index 9d264d971..0b1509e2f 100644
--- a/src/mem/dram_ctrl.cc
+++ b/src/mem/dram_ctrl.cc
@@ -2169,8 +2169,6 @@ DRAMCtrl::getSlavePort(const string &if_name, PortID idx)
 unsigned int
 DRAMCtrl::drain(DrainManager *dm)
 {
-    unsigned int count = port.drain(dm);
-
     // if there is anything in any of our internal queues, keep track
     // of that as well
     if (!(writeQueue.empty() && readQueue.empty() &&
@@ -2178,7 +2176,6 @@ DRAMCtrl::drain(DrainManager *dm)
         DPRINTF(Drain, "DRAM controller not drained, write: %d, read: %d,"
                 " resp: %d\n", writeQueue.size(), readQueue.size(),
                 respQueue.size());
-        ++count;
         drainManager = dm;
 
         // the only part that is not drained automatically over time
@@ -2186,13 +2183,12 @@ DRAMCtrl::drain(DrainManager *dm)
         if (!writeQueue.empty() && !nextReqEvent.scheduled()) {
             schedule(nextReqEvent, curTick());
         }
-    }
-
-    if (count)
         setDrainState(DrainState::Draining);
-    else
+        return 1;
+    } else {
         setDrainState(DrainState::Drained);
-    return count;
+        return 0;
+    }
 }
 
 void
diff --git a/src/mem/noncoherent_xbar.cc b/src/mem/noncoherent_xbar.cc
index 330a91f1f..409937826 100644
--- a/src/mem/noncoherent_xbar.cc
+++ b/src/mem/noncoherent_xbar.cc
@@ -313,18 +313,6 @@ NoncoherentXBar::recvFunctional(PacketPtr pkt, PortID slave_port_id)
     masterPorts[dest_id]->sendFunctional(pkt);
 }
 
-unsigned int
-NoncoherentXBar::drain(DrainManager *dm)
-{
-    // sum up the individual layers
-    unsigned int total = 0;
-    for (auto l: reqLayers)
-        total += l->drain(dm);
-    for (auto l: respLayers)
-        total += l->drain(dm);
-    return total;
-}
-
 NoncoherentXBar*
 NoncoherentXBarParams::create()
 {
diff --git a/src/mem/noncoherent_xbar.hh b/src/mem/noncoherent_xbar.hh
index ffcf9797f..4ff1ec4fc 100644
--- a/src/mem/noncoherent_xbar.hh
+++ b/src/mem/noncoherent_xbar.hh
@@ -195,8 +195,6 @@ class NoncoherentXBar : public BaseXBar
 
     virtual ~NoncoherentXBar();
 
-    unsigned int drain(DrainManager *dm);
-
     /**
      * stats
      */
diff --git a/src/mem/qport.hh b/src/mem/qport.hh
index 8009454ba..94bcc53fd 100644
--- a/src/mem/qport.hh
+++ b/src/mem/qport.hh
@@ -95,8 +95,6 @@ class QueuedSlavePort : public SlavePort
      * functional request. */
     bool checkFunctional(PacketPtr pkt)
     { return respQueue.checkFunctional(pkt); }
-
-    unsigned int drain(DrainManager *dm) { return respQueue.drain(dm); }
 };
 
 /**
@@ -166,9 +164,6 @@ class QueuedMasterPort : public MasterPort
         return reqQueue.checkFunctional(pkt) ||
             snoopRespQueue.checkFunctional(pkt);
     }
-
-    unsigned int drain(DrainManager *dm)
-    { return reqQueue.drain(dm) + snoopRespQueue.drain(dm); }
 };
 
 #endif // __MEM_QPORT_HH__
diff --git a/src/mem/ruby/system/DMASequencer.cc b/src/mem/ruby/system/DMASequencer.cc
index b10538024..0dd28d91c 100644
--- a/src/mem/ruby/system/DMASequencer.cc
+++ b/src/mem/ruby/system/DMASequencer.cc
@@ -161,15 +161,6 @@ DMASequencer::testDrainComplete()
 }
 
 unsigned int
-DMASequencer::getChildDrainCount(DrainManager *dm)
-{
-    int count = 0;
-    count += slave_port.drain(dm);
-    DPRINTF(Config, "count after slave port check %d\n", count);
-    return count;
-}
-
-unsigned int
 DMASequencer::drain(DrainManager *dm)
 {
     if (isDeadlockEventScheduled()) {
@@ -181,11 +172,6 @@ DMASequencer::drain(DrainManager *dm)
     DPRINTF(Config, "outstanding count %d\n", outstandingCount());
     bool need_drain = outstandingCount() > 0;
 
-    //
-    // Also, get the number of child ports that will also need to clear
-    // their buffered requests before they call drainManager->signalDrainDone()
-    //
-    unsigned int child_drain_count = getChildDrainCount(dm);
 
     // Set status
     if (need_drain) {
@@ -193,12 +179,12 @@ DMASequencer::drain(DrainManager *dm)
 
         DPRINTF(Drain, "DMASequencer not drained\n");
         setDrainState(DrainState::Draining);
-        return child_drain_count + 1;
+        return 1;
     }
 
     drainManager = NULL;
     setDrainState(DrainState::Drained);
-    return child_drain_count;
+    return 0;
 }
 
 void
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
index b6aa871b3..5818056e9 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -400,31 +400,6 @@ RubyPort::testDrainComplete()
 }
 
 unsigned int
-RubyPort::getChildDrainCount(DrainManager *dm)
-{
-    int count = 0;
-
-    if (memMasterPort.isConnected()) {
-        count += memMasterPort.drain(dm);
-        DPRINTF(Config, "count after pio check %d\n", count);
-    }
-
-    for (CpuPortIter p = slave_ports.begin(); p != slave_ports.end(); ++p) {
-        count += (*p)->drain(dm);
-        DPRINTF(Config, "count after slave port check %d\n", count);
-    }
-
-    for (std::vector<PioMasterPort *>::iterator p = master_ports.begin();
-         p != master_ports.end(); ++p) {
-        count += (*p)->drain(dm);
-        DPRINTF(Config, "count after master port check %d\n", count);
-    }
-
-    DPRINTF(Config, "final count %d\n", count);
-    return count;
-}
-
-unsigned int
 RubyPort::drain(DrainManager *dm)
 {
     if (isDeadlockEventScheduled()) {
@@ -438,24 +413,18 @@ RubyPort::drain(DrainManager *dm)
     DPRINTF(Config, "outstanding count %d\n", outstandingCount());
     bool need_drain = outstandingCount() > 0;
 
-    //
-    // Also, get the number of child ports that will also need to clear
-    // their buffered requests before they call drainManager->signalDrainDone()
-    //
-    unsigned int child_drain_count = getChildDrainCount(dm);
-
     // Set status
     if (need_drain) {
         drainManager = dm;
 
         DPRINTF(Drain, "RubyPort not drained\n");
         setDrainState(DrainState::Draining);
-        return child_drain_count + 1;
+        return 1;
     }
 
     drainManager = NULL;
     setDrainState(DrainState::Drained);
-    return child_drain_count;
+    return 0;
 }
 
 void
diff --git a/src/mem/ruby/system/RubyPort.hh b/src/mem/ruby/system/RubyPort.hh
index e68af6dab..ff1b2af04 100644
--- a/src/mem/ruby/system/RubyPort.hh
+++ b/src/mem/ruby/system/RubyPort.hh
@@ -193,8 +193,6 @@ class RubyPort : public MemObject
         retryList.push_back(port);
     }
 
-    unsigned int getChildDrainCount(DrainManager *dm);
-
     PioMasterPort pioMasterPort;
     PioSlavePort pioSlavePort;
     MemMasterPort memMasterPort;
diff --git a/src/mem/xbar.hh b/src/mem/xbar.hh
index ede60e666..547e138e9 100644
--- a/src/mem/xbar.hh
+++ b/src/mem/xbar.hh
@@ -467,8 +467,6 @@ class BaseXBar : public MemObject
     BaseSlavePort& getSlavePort(const std::string& if_name,
                                 PortID idx = InvalidPortID);
 
-    virtual unsigned int drain(DrainManager *dm) = 0;
-
     virtual void regStats();
 
 };