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authorGabe Black <gblack@eecs.umich.edu>2007-03-07 20:04:46 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-03-07 20:04:46 +0000
commit54fc750924ebeeb34d598018b664a886cc3f7ac5 (patch)
tree87f21e528a20ac3d44540922a1ebc0e7df3e9389 /src/mem
parent8edc9d79cee3edd6d16a8254a0180aaa242974c7 (diff)
downloadgem5-54fc750924ebeeb34d598018b664a886cc3f7ac5.tar.xz
Move the magic m5 PageTableFault into sim/faults.[hh,cc] since it's the same across all architectures.
--HG-- extra : convert_revision : 18d441eb7ac44df4df41771bfe3dec69f7fa70ec
Diffstat (limited to 'src/mem')
-rw-r--r--src/mem/page_table.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc
index fe8094b88..96bc23793 100644
--- a/src/mem/page_table.cc
+++ b/src/mem/page_table.cc
@@ -157,7 +157,7 @@ PageTable::translate(RequestPtr &req)
assert(pageAlign(req->getVaddr() + req->getSize() - 1)
== pageAlign(req->getVaddr()));
if (!translate(req->getVaddr(), paddr)) {
- return genPageTableFault(req->getVaddr());
+ return Fault(new PageTableFault(req->getVaddr()));
}
req->setPaddr(paddr);
return page_check(req->getPaddr(), req->getSize());