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authorGabe Black <gblack@eecs.umich.edu>2011-10-30 00:32:54 -0700
committerGabe Black <gblack@eecs.umich.edu>2011-10-30 00:32:54 -0700
commit5b433568f05c6f1b093628c2a90f8383abfc1168 (patch)
treebac68683155956bf1a71697f71c810a6a37414f0 /src/mem
parentca36c01f7e515d8042b141c7912e0f090b121e6e (diff)
downloadgem5-5b433568f05c6f1b093628c2a90f8383abfc1168.tar.xz
SE/FS: Build the base process class in FS.
Diffstat (limited to 'src/mem')
-rw-r--r--src/mem/page_table.cc18
-rw-r--r--src/mem/page_table.hh10
-rw-r--r--src/mem/translating_port.cc16
-rw-r--r--src/mem/translating_port.hh11
4 files changed, 7 insertions, 48 deletions
diff --git a/src/mem/page_table.cc b/src/mem/page_table.cc
index a2d566d0c..c260ba2d4 100644
--- a/src/mem/page_table.cc
+++ b/src/mem/page_table.cc
@@ -52,15 +52,9 @@
using namespace std;
using namespace TheISA;
-PageTable::PageTable(
-#if !FULL_SYSTEM
- Process *_process,
-#endif
- Addr _pageSize)
- : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize)))
-#if !FULL_SYSTEM
- , process(_process)
-#endif
+PageTable::PageTable(Process *_process, Addr _pageSize)
+ : pageSize(_pageSize), offsetMask(mask(floorLog2(_pageSize))),
+ process(_process)
{
assert(isPowerOf2(pageSize));
pTableCache[0].vaddr = 0;
@@ -89,11 +83,9 @@ PageTable::allocate(Addr vaddr, int64_t size)
vaddr);
}
-#if !FULL_SYSTEM
pTable[vaddr] = TheISA::TlbEntry(process->M5_pid, vaddr,
process->system->new_page());
updateCache(vaddr, pTable[vaddr]);
-#endif
}
}
@@ -204,9 +196,7 @@ PageTable::serialize(std::ostream &os)
PTableItr iter = pTable.begin();
PTableItr end = pTable.end();
while (iter != end) {
-#if !FULL_SYSTEM
os << "\n[" << csprintf("%s.Entry%d", process->name(), count) << "]\n";
-#endif
paramOut(os, "vaddr", iter->first);
iter->second.serialize(os);
@@ -226,7 +216,6 @@ PageTable::unserialize(Checkpoint *cp, const std::string &section)
pTable.clear();
while (i < count) {
-#if !FULL_SYSTEM
TheISA::TlbEntry *entry;
Addr vaddr;
@@ -235,7 +224,6 @@ PageTable::unserialize(Checkpoint *cp, const std::string &section)
entry->unserialize(cp, csprintf("%s.Entry%d", process->name(), i));
pTable[vaddr] = *entry;
++i;
-#endif
}
}
diff --git a/src/mem/page_table.hh b/src/mem/page_table.hh
index 37bc808e7..36fe88490 100644
--- a/src/mem/page_table.hh
+++ b/src/mem/page_table.hh
@@ -47,9 +47,7 @@
#include "mem/request.hh"
#include "sim/serialize.hh"
-#if !FULL_SYSTEM
class Process;
-#endif
/**
* Page Table Declaration.
@@ -71,17 +69,11 @@ class PageTable
const Addr pageSize;
const Addr offsetMask;
-#if !FULL_SYSTEM
Process *process;
-#endif
public:
- PageTable(
-#if !FULL_SYSTEM
- Process *_process,
-#endif
- Addr _pageSize = TheISA::VMPageSize);
+ PageTable(Process *_process, Addr _pageSize = TheISA::VMPageSize);
~PageTable();
diff --git a/src/mem/translating_port.cc b/src/mem/translating_port.cc
index 260871874..6a383a2bb 100644
--- a/src/mem/translating_port.cc
+++ b/src/mem/translating_port.cc
@@ -33,27 +33,17 @@
#include "arch/isa_traits.hh"
#include "base/chunk_generator.hh"
-#include "config/full_system.hh"
#include "config/the_isa.hh"
#include "mem/page_table.hh"
#include "mem/port.hh"
#include "mem/translating_port.hh"
-#if !FULL_SYSTEM
#include "sim/process.hh"
-#endif
using namespace TheISA;
-TranslatingPort::TranslatingPort(const std::string &_name,
-#if !FULL_SYSTEM
- Process *p,
-#endif
+TranslatingPort::TranslatingPort(const std::string &_name, Process *p,
AllocType alloc)
- : FunctionalPort(_name),
-#if !FULL_SYSTEM
- pTable(p->pTable), process(p),
-#endif
- allocating(alloc)
+ : FunctionalPort(_name), pTable(p->pTable), process(p), allocating(alloc)
{ }
TranslatingPort::~TranslatingPort()
@@ -99,11 +89,9 @@ TranslatingPort::tryWriteBlob(Addr addr, uint8_t *p, int size)
VMPageSize);
} else if (allocating == NextPage) {
// check if we've accessed the next page on the stack
-#if !FULL_SYSTEM
if (!process->fixupStackFault(gen.addr()))
panic("Page table fault when accessing virtual address %#x "
"during functional write\n", gen.addr());
-#endif
} else {
return false;
}
diff --git a/src/mem/translating_port.hh b/src/mem/translating_port.hh
index dffcac766..438d8fe61 100644
--- a/src/mem/translating_port.hh
+++ b/src/mem/translating_port.hh
@@ -32,13 +32,10 @@
#ifndef __MEM_TRANSLATING_PROT_HH__
#define __MEM_TRANSLATING_PROT_HH__
-#include "config/full_system.hh"
#include "mem/port.hh"
class PageTable;
-#if !FULL_SYSTEM
class Process;
-#endif
class TranslatingPort : public FunctionalPort
{
@@ -51,17 +48,11 @@ class TranslatingPort : public FunctionalPort
private:
PageTable *pTable;
-#if !FULL_SYSTEM
Process *process;
-#endif
AllocType allocating;
public:
- TranslatingPort(const std::string &_name,
-#if !FULL_SYSTEM
- Process *p,
-#endif
- AllocType alloc);
+ TranslatingPort(const std::string &_name, Process *p, AllocType alloc);
virtual ~TranslatingPort();
bool tryReadBlob(Addr addr, uint8_t *p, int size);