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authorSteve Reinhardt <stever@eecs.umich.edu>2006-06-13 23:19:28 -0400
committerSteve Reinhardt <stever@eecs.umich.edu>2006-06-13 23:19:28 -0400
commite981a97dec3df921f3800fd9ae5ec01ed4e9d2b1 (patch)
treeafca175c8609437088ebb8ca6635134b87e6cf32 /src/mem
parent285b88a57b0111cc6698f2e30182dca17d8ea15a (diff)
downloadgem5-e981a97dec3df921f3800fd9ae5ec01ed4e9d2b1.tar.xz
Move SimObject creation and Port connection loops
into Python. Add Port and VectorPort objects and support for specifying port connections via assignment. The whole C++ ConfigNode hierarchy is gone now, as are C++ Connector objects. configs/test/fs.py: configs/test/test.py: Rewrite for new port connector syntax. src/SConscript: Remove unneeded files: - mem/connector.* - sim/config* src/dev/io_device.hh: src/mem/bridge.cc: src/mem/bridge.hh: src/mem/bus.cc: src/mem/bus.hh: src/mem/mem_object.hh: src/mem/physical.cc: src/mem/physical.hh: Allow getPort() to take an optional index to support vector ports (eventually). src/python/m5/__init__.py: Move SimObject construction and port connection operations into Python (with C++ calls). src/python/m5/config.py: Move SimObject construction and port connection operations into Python (with C++ calls). Add support for declaring and connecting MemObject ports in Python. src/python/m5/objects/Bus.py: src/python/m5/objects/PhysicalMemory.py: Add port declaration. src/sim/builder.cc: src/sim/builder.hh: src/sim/serialize.cc: src/sim/serialize.hh: ConfigNodes are gone; builder just gets the name of a .ini file section now. src/sim/main.cc: Move SimObject construction and port connection operations into Python (with C++ calls). Split remaining initialization operations into two parts, loadIniFile() and finalInit(). src/sim/param.cc: src/sim/param.hh: SimObject resolution done globally in Python now (not via ConfigNode hierarchy). src/sim/sim_object.cc: Remove unneeded #include. --HG-- extra : convert_revision : 2fa4001eaaec0c9a4231ef6e854f8e156d930dfe
Diffstat (limited to 'src/mem')
-rw-r--r--src/mem/bridge.cc2
-rw-r--r--src/mem/bridge.hh2
-rw-r--r--src/mem/bus.cc2
-rw-r--r--src/mem/bus.hh2
-rw-r--r--src/mem/mem_object.hh2
-rw-r--r--src/mem/physical.cc4
-rw-r--r--src/mem/physical.hh2
7 files changed, 8 insertions, 8 deletions
diff --git a/src/mem/bridge.cc b/src/mem/bridge.cc
index 3718cbaaf..29ea2e12f 100644
--- a/src/mem/bridge.cc
+++ b/src/mem/bridge.cc
@@ -59,7 +59,7 @@ Bridge::Bridge(const std::string &n, int qsa, int qsb,
}
Port *
-Bridge::getPort(const std::string &if_name)
+Bridge::getPort(const std::string &if_name, int idx)
{
BridgePort *port;
diff --git a/src/mem/bridge.hh b/src/mem/bridge.hh
index 37fb92662..b3525d3e0 100644
--- a/src/mem/bridge.hh
+++ b/src/mem/bridge.hh
@@ -177,7 +177,7 @@ class Bridge : public MemObject
public:
/** A function used to return the port associated with this bus object. */
- virtual Port *getPort(const std::string &if_name);
+ virtual Port *getPort(const std::string &if_name, int idx = -1);
virtual void init();
diff --git a/src/mem/bus.cc b/src/mem/bus.cc
index 919acd23c..19a3dc9e4 100644
--- a/src/mem/bus.cc
+++ b/src/mem/bus.cc
@@ -38,7 +38,7 @@
#include "sim/builder.hh"
Port *
-Bus::getPort(const std::string &if_name)
+Bus::getPort(const std::string &if_name, int idx)
{
// if_name ignored? forced to be empty?
int id = interfaces.size();
diff --git a/src/mem/bus.hh b/src/mem/bus.hh
index 50bfba6e4..c2b78c31f 100644
--- a/src/mem/bus.hh
+++ b/src/mem/bus.hh
@@ -161,7 +161,7 @@ class Bus : public MemObject
public:
/** A function used to return the port associated with this bus object. */
- virtual Port *getPort(const std::string &if_name);
+ virtual Port *getPort(const std::string &if_name, int idx = -1);
virtual void init();
diff --git a/src/mem/mem_object.hh b/src/mem/mem_object.hh
index ac547619d..c81ea03d8 100644
--- a/src/mem/mem_object.hh
+++ b/src/mem/mem_object.hh
@@ -50,7 +50,7 @@ class MemObject : public SimObject
public:
/** Additional function to return the Port of a memory object. */
- virtual Port *getPort(const std::string &if_name) = 0;
+ virtual Port *getPort(const std::string &if_name, int idx = -1) = 0;
};
#endif //__MEM_MEM_OBJECT_HH__
diff --git a/src/mem/physical.cc b/src/mem/physical.cc
index fb31fb4a3..2d66602ab 100644
--- a/src/mem/physical.cc
+++ b/src/mem/physical.cc
@@ -173,9 +173,9 @@ PhysicalMemory::doFunctionalAccess(Packet *pkt)
}
Port *
-PhysicalMemory::getPort(const std::string &if_name)
+PhysicalMemory::getPort(const std::string &if_name, int idx)
{
- if (if_name == "") {
+ if (if_name == "port" && idx == -1) {
if (port != NULL)
panic("PhysicalMemory::getPort: additional port requested to memory!");
port = new MemoryPort(name() + "-port", this);
diff --git a/src/mem/physical.hh b/src/mem/physical.hh
index 88ea543da..50fa75ed3 100644
--- a/src/mem/physical.hh
+++ b/src/mem/physical.hh
@@ -108,7 +108,7 @@ class PhysicalMemory : public MemObject
public:
int deviceBlockSize();
void getAddressRanges(AddrRangeList &resp, AddrRangeList &snoop);
- virtual Port *getPort(const std::string &if_name);
+ virtual Port *getPort(const std::string &if_name, int idx = -1);
void virtual init();
// fast back-door memory access for vtophys(), remote gdb, etc.