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author | Robert Kovacsics <rmk35@cl.cam.ac.uk> | 2018-07-13 14:21:53 +0100 |
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committer | Kovacsics RĂ³bert <kovirobi@gmail.com> | 2018-07-19 13:43:35 +0000 |
commit | ed427a3fcdf49a0ea0afa212c96240a04d4678d7 (patch) | |
tree | 43ab19aadc833a98147c7ba38fa596669a47cca2 /src/mem | |
parent | ff52563a214c71fcd1e21e9f00ad839612032e3b (diff) | |
download | gem5-ed427a3fcdf49a0ea0afa212c96240a04d4678d7.tar.xz |
mem-cache: Typo in comment: 'proceed' -> 'precede'
The writebacks happen before anything below, not after.
Change-Id: I7eaefbbf33aa17c496255dedd964a56118a28741
Reviewed-on: https://gem5-review.googlesource.com/11749
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/mem')
-rw-r--r-- | src/mem/cache/base.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/mem/cache/base.cc b/src/mem/cache/base.cc index 8fd9ac298..c1ebdd6c0 100644 --- a/src/mem/cache/base.cc +++ b/src/mem/cache/base.cc @@ -348,7 +348,7 @@ BaseCache::recvTimingReq(PacketPtr pkt) satisfied = access(pkt, blk, lat, writebacks); // copy writebacks to write buffer here to ensure they logically - // proceed anything happening below + // precede anything happening below doWritebacks(writebacks, forward_time); } @@ -593,7 +593,7 @@ BaseCache::recvAtomic(PacketPtr pkt) } // handle writebacks resulting from the access here to ensure they - // logically proceed anything happening below + // logically precede anything happening below doWritebacksAtomic(writebacks); assert(writebacks.empty()); |