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authorBrad Beckmann <Brad.Beckmann@amd.com>2012-04-06 13:47:06 -0700
committerBrad Beckmann <Brad.Beckmann@amd.com>2012-04-06 13:47:06 -0700
commitf050ebe3a87b0db01cfe2d6bee4fac083d659665 (patch)
tree3e721e0c69bb0fa53db0219617a3eaa0dc7f7f16 /src/mem
parent0a9f4b950fb52db3951ad1f7aafc674b505d2679 (diff)
downloadgem5-f050ebe3a87b0db01cfe2d6bee4fac083d659665.tar.xz
MOESI_hammer: fixed bug with single cpu + flushes, then modified the regression tester to check this functionality
Diffstat (limited to 'src/mem')
-rw-r--r--src/mem/protocol/MOESI_hammer-dir.sm6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/mem/protocol/MOESI_hammer-dir.sm b/src/mem/protocol/MOESI_hammer-dir.sm
index dfb62e844..24d64349e 100644
--- a/src/mem/protocol/MOESI_hammer-dir.sm
+++ b/src/mem/protocol/MOESI_hammer-dir.sm
@@ -493,7 +493,7 @@ machine(Directory, "AMD Hammer-like protocol")
action(oc_sendBlockAck, "oc", desc="Send block ack to the owner") {
peek(requestQueue_in, RequestMsg) {
- if ((probe_filter_enabled || full_bit_dir_enabled) && (in_msg.Requestor == cache_entry.Owner)) {
+ if (((probe_filter_enabled || full_bit_dir_enabled) && (in_msg.Requestor == cache_entry.Owner)) || machineCount(MachineType:L1Cache) == 1) {
enqueue(forwardNetwork_out, RequestMsg, latency=memory_controller_latency) {
out_msg.Address := address;
out_msg.Type := CoherenceRequestType:BLOCK_ACK;
@@ -1033,7 +1033,7 @@ machine(Directory, "AMD Hammer-like protocol")
}
action(nofc_forwardRequestConditionalOwner, "nofc", desc="Forward request to one or more nodes if the requestor is not the owner") {
- assert(machineCount(MachineType:L1Cache) > 1);
+ if (machineCount(MachineType:L1Cache) > 1) {
if (probe_filter_enabled || full_bit_dir_enabled) {
peek(requestQueue_in, RequestMsg) {
@@ -1065,7 +1065,7 @@ machine(Directory, "AMD Hammer-like protocol")
}
}
}
-
+ }
}
action(f_forwardWriteFromDma, "fw", desc="Forward requests") {