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authorSteve Reinhardt <stever@gmail.com>2008-03-22 22:17:15 -0400
committerSteve Reinhardt <stever@gmail.com>2008-03-22 22:17:15 -0400
commit407710d387497f44de53baf0ae60a2c426c1bb74 (patch)
tree7b47f6f020e177263968da388224d35889d82fc1 /src/mem
parent3fe1af795243b42bd957d5fc6f243bb63f603f7d (diff)
downloadgem5-407710d387497f44de53baf0ae60a2c426c1bb74.tar.xz
Fix cache problem with writes to tempBlock
getting wrong writeback address. --HG-- extra : convert_revision : 023dfb69c227c13a69bfe2744c6af75a45828b0b
Diffstat (limited to 'src/mem')
-rw-r--r--src/mem/cache/cache_impl.hh1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh
index cf9528a75..2f4567e0d 100644
--- a/src/mem/cache/cache_impl.hh
+++ b/src/mem/cache/cache_impl.hh
@@ -941,6 +941,7 @@ Cache<TagStore>::handleFill(PacketPtr pkt, BlkType *blk,
assert(!tempBlock->isValid());
blk = tempBlock;
tempBlock->set = tags->extractSet(addr);
+ tempBlock->tag = tags->extractTag(addr);
DPRINTF(Cache, "using temp block for %x\n", addr);
}
} else {