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authorLisa Hsu <Lisa.Hsu@amd.com>2011-03-17 17:08:35 -0700
committerLisa Hsu <Lisa.Hsu@amd.com>2011-03-17 17:08:35 -0700
commitc4de6a05229bbc42ae4b247541c823edb8d4ca76 (patch)
tree0a7551275a08e67ca1317949b796e026079f20eb /src/mem
parent556b5c5488e01652ac52ac76337da9533ec6a169 (diff)
downloadgem5-c4de6a05229bbc42ae4b247541c823edb8d4ca76.tar.xz
Ruby: minor bugfix, line did not adhere to some macro usage conventions.
Diffstat (limited to 'src/mem')
-rw-r--r--src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh b/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh
index 82c95c469..1858085cc 100644
--- a/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh
+++ b/src/mem/ruby/slicc_interface/RubySlicc_ComponentMapping.hh
@@ -125,7 +125,7 @@ machineIDToMachineType(MachineID machID)
inline NodeID
L1CacheMachIDToProcessorNum(MachineID machID)
{
- assert(machID.type == MachineType_L1Cache);
+ assert(machID.type == MACHINETYPE_L1CACHE_ENUM);
return machID.num;
}