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authorAndreas Hansson <andreas.hansson@arm.com>2014-12-02 06:07:34 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2014-12-02 06:07:34 -0500
commit25bfc249998b26403d50587eb66e6ee5e6de5b58 (patch)
treec952ab3ac56ae3fe2f5f88fec797e6a1ca252650 /src/mem
parent0e63d2cd62bbab47a5b05b9b5bee8c1dc0da1683 (diff)
downloadgem5-25bfc249998b26403d50587eb66e6ee5e6de5b58.tar.xz
mem: Remove null-check bypassing in Packet::getPtr
This patch removes the parameter that enables bypassing the null check in the Packet::getPtr method. A number of call sites assume the value to be non-null. The one odd case is the RubyTester, which issues zero-sized prefetches(!), and despite being reads they had no valid data pointer. This is now fixed, but the size oddity remains (unless anyone object or has any good suggestions). Finally, in the Ruby Sequencer, appropriate checks are made for flush packets as they have no valid data pointer.
Diffstat (limited to 'src/mem')
-rw-r--r--src/mem/packet.hh4
-rw-r--r--src/mem/ruby/slicc_interface/RubyRequest.cc2
-rw-r--r--src/mem/ruby/slicc_interface/RubySlicc_Util.hh4
-rw-r--r--src/mem/ruby/system/DMASequencer.cc2
-rw-r--r--src/mem/ruby/system/Sequencer.cc20
5 files changed, 15 insertions, 17 deletions
diff --git a/src/mem/packet.hh b/src/mem/packet.hh
index c7b47c0a7..8d84a7ccb 100644
--- a/src/mem/packet.hh
+++ b/src/mem/packet.hh
@@ -846,9 +846,9 @@ class Packet : public Printable
*/
template <typename T>
T*
- getPtr(bool null_ok = false)
+ getPtr()
{
- assert(null_ok || flags.isSet(STATIC_DATA|DYNAMIC_DATA));
+ assert(flags.isSet(STATIC_DATA|DYNAMIC_DATA));
return (T*)data;
}
diff --git a/src/mem/ruby/slicc_interface/RubyRequest.cc b/src/mem/ruby/slicc_interface/RubyRequest.cc
index 56feee59d..ff90e415e 100644
--- a/src/mem/ruby/slicc_interface/RubyRequest.cc
+++ b/src/mem/ruby/slicc_interface/RubyRequest.cc
@@ -72,7 +72,7 @@ RubyRequest::functionalWrite(Packet *pkt)
Addr mBase = m_PhysicalAddress.getAddress();
Addr mTail = mBase + m_Size;
- uint8_t * pktData = pkt->getPtr<uint8_t>(true);
+ uint8_t * pktData = pkt->getPtr<uint8_t>();
Addr cBase = std::max(wBase, mBase);
Addr cTail = std::min(wTail, mTail);
diff --git a/src/mem/ruby/slicc_interface/RubySlicc_Util.hh b/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
index 5ec34f2dc..8e2a1c5b1 100644
--- a/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
+++ b/src/mem/ruby/slicc_interface/RubySlicc_Util.hh
@@ -107,7 +107,7 @@ testAndRead(Address addr, DataBlock& blk, Packet *pkt)
lineAddr.makeLineAddress();
if (pktLineAddr == lineAddr) {
- uint8_t *data = pkt->getPtr<uint8_t>(true);
+ uint8_t *data = pkt->getPtr<uint8_t>();
unsigned int size_in_bytes = pkt->getSize();
unsigned startByte = pkt->getAddr() - lineAddr.getAddress();
@@ -135,7 +135,7 @@ testAndWrite(Address addr, DataBlock& blk, Packet *pkt)
lineAddr.makeLineAddress();
if (pktLineAddr == lineAddr) {
- uint8_t *data = pkt->getPtr<uint8_t>(true);
+ uint8_t *data = pkt->getPtr<uint8_t>();
unsigned int size_in_bytes = pkt->getSize();
unsigned startByte = pkt->getAddr() - lineAddr.getAddress();
diff --git a/src/mem/ruby/system/DMASequencer.cc b/src/mem/ruby/system/DMASequencer.cc
index eb4ce6123..2c4c024b6 100644
--- a/src/mem/ruby/system/DMASequencer.cc
+++ b/src/mem/ruby/system/DMASequencer.cc
@@ -235,7 +235,7 @@ DMASequencer::makeRequest(PacketPtr pkt)
}
uint64_t paddr = pkt->getAddr();
- uint8_t* data = pkt->getPtr<uint8_t>(true);
+ uint8_t* data = pkt->getPtr<uint8_t>();
int len = pkt->getSize();
bool write = pkt->isWrite();
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index bd82d9468..281ea22be 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -524,28 +524,23 @@ Sequencer::hitCallback(SequencerRequest* srequest, DataBlock& data,
llscSuccess ? "Done" : "SC_Failed", "", "",
request_address, total_latency);
- // update the data
+ // update the data unless it is a non-data-carrying flush
if (g_system_ptr->m_warmup_enabled) {
- assert(pkt->getPtr<uint8_t>(false) != NULL);
- data.setData(pkt->getPtr<uint8_t>(false),
+ data.setData(pkt->getPtr<uint8_t>(),
request_address.getOffset(), pkt->getSize());
- } else if (pkt->getPtr<uint8_t>(true) != NULL) {
+ } else if (!pkt->isFlush()) {
if ((type == RubyRequestType_LD) ||
(type == RubyRequestType_IFETCH) ||
(type == RubyRequestType_RMW_Read) ||
(type == RubyRequestType_Locked_RMW_Read) ||
(type == RubyRequestType_Load_Linked)) {
- memcpy(pkt->getPtr<uint8_t>(true),
+ memcpy(pkt->getPtr<uint8_t>(),
data.getData(request_address.getOffset(), pkt->getSize()),
pkt->getSize());
} else {
- data.setData(pkt->getPtr<uint8_t>(true),
+ data.setData(pkt->getPtr<uint8_t>(),
request_address.getOffset(), pkt->getSize());
}
- } else {
- DPRINTF(MemoryAccess,
- "WARNING. Data not transfered from Ruby to M5 for type %s\n",
- RubyRequestType_to_string(type));
}
// If using the RubyTester, update the RubyTester sender state's
@@ -679,9 +674,12 @@ Sequencer::issueRequest(PacketPtr pkt, RubyRequestType secondary_type)
pc = pkt->req->getPC();
}
+ // check if the packet has data as for example prefetch and flush
+ // requests do not
std::shared_ptr<RubyRequest> msg =
std::make_shared<RubyRequest>(clockEdge(), pkt->getAddr(),
- pkt->getPtr<uint8_t>(true),
+ pkt->isFlush() ?
+ nullptr : pkt->getPtr<uint8_t>(),
pkt->getSize(), pc, secondary_type,
RubyAccessMode_Supervisor, pkt,
PrefetchBit_No, proc_id);