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authorAndreas Hansson <andreas.hansson@arm.com>2015-03-19 04:06:11 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2015-03-19 04:06:11 -0400
commit5275c9d740589abd631571cf48ac57d393d28093 (patch)
treeba07420117a6e353e2a24bdafc44db268a9554be /src/mem
parent1d403960afec613f3aa9f1fc2ffc3287139e1d86 (diff)
downloadgem5-5275c9d740589abd631571cf48ac57d393d28093.tar.xz
mem: Use emplace front/back for deferred packets
Embrace C++11 for the deferred packets as we actually store the objects in the data structure, and not just pointers.
Diffstat (limited to 'src/mem')
-rw-r--r--src/mem/bridge.cc4
-rw-r--r--src/mem/cache/prefetch/queued.cc2
-rw-r--r--src/mem/packet_queue.cc8
-rw-r--r--src/mem/simple_mem.cc2
4 files changed, 8 insertions, 8 deletions
diff --git a/src/mem/bridge.cc b/src/mem/bridge.cc
index 5b925d1cb..6bc8c18f2 100644
--- a/src/mem/bridge.cc
+++ b/src/mem/bridge.cc
@@ -217,7 +217,7 @@ Bridge::BridgeMasterPort::schedTimingReq(PacketPtr pkt, Tick when)
assert(transmitList.size() != reqQueueLimit);
- transmitList.push_back(DeferredPacket(pkt, when));
+ transmitList.emplace_back(DeferredPacket(pkt, when));
}
@@ -232,7 +232,7 @@ Bridge::BridgeSlavePort::schedTimingResp(PacketPtr pkt, Tick when)
bridge.schedule(sendEvent, when);
}
- transmitList.push_back(DeferredPacket(pkt, when));
+ transmitList.emplace_back(DeferredPacket(pkt, when));
}
void
diff --git a/src/mem/cache/prefetch/queued.cc b/src/mem/cache/prefetch/queued.cc
index 318d565dc..97ea4eee6 100644
--- a/src/mem/cache/prefetch/queued.cc
+++ b/src/mem/cache/prefetch/queued.cc
@@ -149,7 +149,7 @@ QueuedPrefetcher::notify(const PacketPtr &pkt)
DPRINTF(HWPrefetch, "Prefetch queued. "
"addr:%#x tick:%lld.\n", pf_addr, pf_time);
- pfq.push_back(DeferredPacket(pf_time, pf_pkt));
+ pfq.emplace_back(DeferredPacket(pf_time, pf_pkt));
}
}
diff --git a/src/mem/packet_queue.cc b/src/mem/packet_queue.cc
index 1b2c69930..86cf599ab 100644
--- a/src/mem/packet_queue.cc
+++ b/src/mem/packet_queue.cc
@@ -142,7 +142,7 @@ PacketQueue::schedSendTiming(PacketPtr pkt, Tick when, bool force_order)
// note that currently we ignore a potentially outstanding retry
// and could in theory put a new packet at the head of the
// transmit list before retrying the existing packet
- transmitList.push_front(DeferredPacket(when, pkt));
+ transmitList.emplace_front(DeferredPacket(when, pkt));
schedSendEvent(when);
return;
}
@@ -157,7 +157,7 @@ PacketQueue::schedSendTiming(PacketPtr pkt, Tick when, bool force_order)
// list is non-empty and this belongs at the end
if (when >= transmitList.back().tick) {
- transmitList.push_back(DeferredPacket(when, pkt));
+ transmitList.emplace_back(DeferredPacket(when, pkt));
return;
}
@@ -169,7 +169,7 @@ PacketQueue::schedSendTiming(PacketPtr pkt, Tick when, bool force_order)
++i; // already checked for insertion at front
while (i != transmitList.end() && when >= i->tick)
++i;
- transmitList.insert(i, DeferredPacket(when, pkt));
+ transmitList.emplace(i, DeferredPacket(when, pkt));
}
void
@@ -233,7 +233,7 @@ PacketQueue::sendDeferredPacket()
schedSendEvent(deferredPacketReadyTime());
} else {
// put the packet back at the front of the list
- transmitList.push_front(dp);
+ transmitList.emplace_front(dp);
}
}
diff --git a/src/mem/simple_mem.cc b/src/mem/simple_mem.cc
index 52fd753c8..180339459 100644
--- a/src/mem/simple_mem.cc
+++ b/src/mem/simple_mem.cc
@@ -161,7 +161,7 @@ SimpleMemory::recvTimingReq(PacketPtr pkt)
// to keep things simple (and in order), we put the packet at
// the end even if the latency suggests it should be sent
// before the packet(s) before it
- packetQueue.push_back(DeferredPacket(pkt, curTick() + getLatency()));
+ packetQueue.emplace_back(DeferredPacket(pkt, curTick() + getLatency()));
if (!retryResp && !dequeueEvent.scheduled())
schedule(dequeueEvent, packetQueue.back().tick);
} else {