diff options
author | Ron Dreslinski <rdreslin@umich.edu> | 2006-11-12 06:36:33 -0500 |
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committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-11-12 06:36:33 -0500 |
commit | b22d390721275fec8c07bd57d9ed021e78f3f3f7 (patch) | |
tree | f5a21c77fa0e9c3384f238dea3305a4a1bd15678 /src/mem | |
parent | c577665040342bf27808bfdea272626e4dac786d (diff) | |
download | gem5-b22d390721275fec8c07bd57d9ed021e78f3f3f7.tar.xz |
Yet another small bug in mem system related to flow control
src/mem/cache/cache_impl.hh:
When upgrades change to readEx make sure to allocate the block
Fix dprintf
--HG--
extra : convert_revision : 8700a7e47ad042c8708302620b907849c4bfdded
Diffstat (limited to 'src/mem')
-rw-r--r-- | src/mem/cache/cache_impl.hh | 14 |
1 files changed, 11 insertions, 3 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index 176d9159a..51aa4f8e7 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -333,6 +333,8 @@ Cache<TagStore,Buffering,Coherence>::handleResponse(PacketPtr &pkt) DPRINTF(Cache, "Handling reponse to %x\n", pkt->getAddr()); if (pkt->isCacheFill() && !pkt->isNoAllocate()) { + DPRINTF(Cache, "Block for addr %x being updated in Cache\n", + pkt->getAddr()); blk = tags->findBlock(pkt); CacheBlk::State old_state = (blk) ? blk->status : 0; PacketList writebacks; @@ -483,9 +485,15 @@ Cache<TagStore,Buffering,Coherence>::snoop(PacketPtr &pkt) respondToSnoop(pkt, curTick + hitLatency); return; } - if (blk) + if (blk) { DPRINTF(Cache, "Cache snooped a %s request for addr %x, " "new state is %i\n", pkt->cmdString(), blk_addr, new_state); + if (mshr && !mshr->inService && new_state == 0) { + //There was a outstanding write to a shared block, not need ReadEx + //not update, so change No Allocate param in MSHR + mshr->pkt->flags &= ~NO_ALLOCATE; + } + } tags->handleSnoop(blk, new_state); } @@ -534,7 +542,7 @@ Cache<TagStore,Buffering,Coherence>::probe(PacketPtr &pkt, bool update, } } - if (!update && (pkt->isWrite() || (otherSidePort == cpuSidePort))) { + if (!update && (otherSidePort == cpuSidePort)) { // Still need to change data in all locations. otherSidePort->checkAndSendFunctional(pkt); if (pkt->isRead() && pkt->result == Packet::Success) @@ -572,7 +580,7 @@ Cache<TagStore,Buffering,Coherence>::probe(PacketPtr &pkt, bool update, // probed request, need to update data if (target->intersect(pkt)) { DPRINTF(Cache, "Functional %s access to blk_addr %x intersects a MSHR\n", - blk_addr); + pkt->cmdString(), blk_addr); notDone = fixPacket(pkt, target); } } |