diff options
author | Kevin Lim <ktlim@umich.edu> | 2006-11-02 15:20:47 -0500 |
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committer | Kevin Lim <ktlim@umich.edu> | 2006-11-02 15:20:47 -0500 |
commit | e71ccde66369951c23eb20281c68a8cb66c4a504 (patch) | |
tree | 209293eb44ceeee7eb04bc778956f57ae812978b /src/mem | |
parent | 683d8f0831b476a906dc2720265a2334ba0117e3 (diff) | |
parent | 45363ea658251df0c31a75d7bd5d0ac3a3809623 (diff) | |
download | gem5-e71ccde66369951c23eb20281c68a8cb66c4a504.tar.xz |
Merge ktlim@zizzer:/bk/newmem
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-busfix
--HG--
extra : convert_revision : a9a41e2c292bd95aa148e1cf4d9a77c0622a462b
Diffstat (limited to 'src/mem')
-rw-r--r-- | src/mem/bus.cc | 37 | ||||
-rw-r--r-- | src/mem/bus.hh | 9 | ||||
-rw-r--r-- | src/mem/cache/base_cache.cc | 4 |
3 files changed, 34 insertions, 16 deletions
diff --git a/src/mem/bus.cc b/src/mem/bus.cc index 41dc9acbf..28ee3476b 100644 --- a/src/mem/bus.cc +++ b/src/mem/bus.cc @@ -42,13 +42,14 @@ Port * Bus::getPort(const std::string &if_name, int idx) { - if (if_name == "default") + if (if_name == "default") { if (defaultPort == NULL) { defaultPort = new BusPort(csprintf("%s-default",name()), this, - defaultId); + defaultId); return defaultPort; } else fatal("Default port already set\n"); + } // if_name ignored? forced to be empty? int id = interfaces.size(); @@ -272,7 +273,16 @@ Bus::findPort(Addr addr, int id) return defaultPort; } } - panic("Unable to find destination for addr: %#llx", addr); + + if (responderSet) { + panic("Unable to find destination for addr (user set default " + "responder): %#llx", addr); + } else { + DPRINTF(Bus, "Unable to find destination for addr: %#llx, will use " + "default port", addr); + + return defaultPort; + } } @@ -395,12 +405,15 @@ Bus::recvStatusChange(Port::Status status, int id) if (id == defaultId) { defaultRange.clear(); - defaultPort->getPeerAddressRanges(ranges, snoops); - assert(snoops.size() == 0); - for(iter = ranges.begin(); iter != ranges.end(); iter++) { - defaultRange.push_back(*iter); - DPRINTF(BusAddrRanges, "Adding range %#llx - %#llx for default range\n", - iter->start, iter->end); + // Only try to update these ranges if the user set a default responder. + if (responderSet) { + defaultPort->getPeerAddressRanges(ranges, snoops); + assert(snoops.size() == 0); + for(iter = ranges.begin(); iter != ranges.end(); iter++) { + defaultRange.push_back(*iter); + DPRINTF(BusAddrRanges, "Adding range %#llx - %#llx for default range\n", + iter->start, iter->end); + } } } else { @@ -520,18 +533,20 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(Bus) Param<int> bus_id; Param<int> clock; Param<int> width; + Param<bool> responder_set; END_DECLARE_SIM_OBJECT_PARAMS(Bus) BEGIN_INIT_SIM_OBJECT_PARAMS(Bus) INIT_PARAM(bus_id, "a globally unique bus id"), INIT_PARAM(clock, "bus clock speed"), - INIT_PARAM(width, "width of the bus (bits)") + INIT_PARAM(width, "width of the bus (bits)"), + INIT_PARAM(responder_set, "Is a default responder set by the user") END_INIT_SIM_OBJECT_PARAMS(Bus) CREATE_SIM_OBJECT(Bus) { - return new Bus(getInstanceName(), bus_id, clock, width); + return new Bus(getInstanceName(), bus_id, clock, width, responder_set); } REGISTER_SIM_OBJECT("Bus", Bus) diff --git a/src/mem/bus.hh b/src/mem/bus.hh index 27624b378..1d1cfde89 100644 --- a/src/mem/bus.hh +++ b/src/mem/bus.hh @@ -242,6 +242,9 @@ class Bus : public MemObject /** Port that handles requests that don't match any of the interfaces.*/ BusPort *defaultPort; + /** Has the user specified their own default responder? */ + bool responderSet; + public: /** A function used to return the port associated with this bus object. */ @@ -251,9 +254,11 @@ class Bus : public MemObject unsigned int drain(Event *de); - Bus(const std::string &n, int bus_id, int _clock, int _width) + Bus(const std::string &n, int bus_id, int _clock, int _width, + bool responder_set) : MemObject(n), busId(bus_id), clock(_clock), width(_width), - tickNextIdle(0), busIdle(this), inRetry(false), defaultPort(NULL) + tickNextIdle(0), busIdle(this), inRetry(false), defaultPort(NULL), + responderSet(responder_set) { //Both the width and clock period must be positive if (width <= 0) diff --git a/src/mem/cache/base_cache.cc b/src/mem/cache/base_cache.cc index 47d40a490..1c519fb86 100644 --- a/src/mem/cache/base_cache.cc +++ b/src/mem/cache/base_cache.cc @@ -357,9 +357,7 @@ BaseCache::getPort(const std::string &if_name, int idx) } else if (if_name == "functional") { - if(cpuSidePort == NULL) - cpuSidePort = new CachePort(name() + "-cpu_side_port", this, true); - return cpuSidePort; + return new CachePort(name() + "-cpu_side_port", this, true); } else if (if_name == "cpu_side") { |