proto, probe: Add elastic trace probe to o3 cpu

The elastic trace is a type of probe listener and listens to probe points
in multiple stages of the O3CPU. The notify method is called on a probe
point typically when an instruction successfully progresses through that
stage.

As different listener methods mapped to the different probe points execute,
relevant information about the instruction, e.g. timestamps and register
accesses, are captured and stored in temporary InstExecInfo class objects.
When the instruction progresses through the commit stage, the timing and the
dependency information about the instruction is finalised and encapsulated in
a struct called TraceInfo. TraceInfo objects are collected in a list instead
of writing them out to the trace file one a time. This is required as the
trace is processed in chunks to evaluate order dependencies and computational
delay in case an instruction does not have any register dependencies. By this
we achieve a simpler algorithm during replay because every record in the
trace can be hooked onto a record in its past. The instruction dependency
trace is written out as a protobuf format file. A second trace containing
fetch requests at absolute timestamps is written to a separate protobuf
format file.

If the instruction is not executed then it is not added to the trace.
The code checks if the instruction had a fault, if it predicated
false and thus previous register values were restored or if it was a
load/store that did not have a request (e.g. when the size of the
request is zero). In all these cases the instruction is set as
executed by the Execute stage and is picked up by the commit probe
listener. But a request is not issued and registers are not written.
So practically, skipping these should not hurt the dependency modelling.

If squashing results in squashing younger instructions, it may happen that
the squash probe discards the inst and removes it from the temporary
store but execute stage deals with the instruction in the next cycle which
results in the execute probe seeing this inst as 'new' inst. A sequence
number of the last processed trace record is used to trap these cases and
not add to the temporary store.

The elastic instruction trace and fetch request trace can be read in and
played back by the TraceCPU.

3 files changed, 79 insertions, 0 deletions

diff --git a/src/proto/SConscript b/src/proto/SConscript
index 292a23639..ef6bc2aca 100644
--- a/src/proto/SConscript
+++ b/src/proto/SConscript
@@ -41,6 +41,7 @@ Import('*')
 
 # Only build if we have protobuf support
 if env['HAVE_PROTOBUF']:
+    ProtoBuf('inst_dep_record.proto')
     ProtoBuf('packet.proto')
     ProtoBuf('inst.proto')
     Source('protoio.cc')
diff --git a/src/proto/inst_dep_record.proto b/src/proto/inst_dep_record.proto
new file mode 100644
index 000000000..7035bfc74
--- /dev/null
+++ b/src/proto/inst_dep_record.proto
@@ -0,0 +1,75 @@
+// Copyright (c) 2013 ARM Limited
+// All rights reserved
+//
+// The license below extends only to copyright in the software and shall
+// not be construed as granting a license to any other intellectual
+// property including but not limited to intellectual property relating
+// to a hardware implementation of the functionality of the software
+// licensed hereunder.  You may use the software subject to the license
+// terms below provided that you ensure that this notice is replicated
+// unmodified and in its entirety in all distributions of the software,
+// modified or unmodified, in source code or in binary form.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are
+// met: redistributions of source code must retain the above copyright
+// notice, this list of conditions and the following disclaimer;
+// redistributions in binary form must reproduce the above copyright
+// notice, this list of conditions and the following disclaimer in the
+// documentation and/or other materials provided with the distribution;
+// neither the name of the copyright holders nor the names of its
+// contributors may be used to endorse or promote products derived from
+// this software without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+//
+// Authors: Radhika Jagtap
+
+// Put all the generated messages in a namespace
+package ProtoMessage;
+
+// Packet header for the o3cpu data dependency trace. The header fields are the
+// identifier describing what object captured the trace, the version of this
+// file format, the tick frequency of the object and the window size used to
+// limit the register dependencies during capture.
+message InstDepRecordHeader {
+  required string obj_id = 1;
+  optional uint32 ver = 2 [default = 0];
+  required uint64 tick_freq = 3;
+  required uint32 window_size = 4;
+}
+
+// Packet to encapsulate an instruction in the o3cpu data dependency trace.
+// The required fields include the instruction sequence number, whether it
+// is a load, and whether it is a store. The request related fields are
+// optional, namely address, size and flags. These exist only if the
+// instruction is a load or store. The dependency related information includes
+// a repeated field for order dependencies, a repeated field for register
+// dependencies and the computational delay with respect to the dependency
+// that completed last. A weight field is used to account for committed
+// instructions that were filtered out before writing the trace and is used
+// to estimate ROB occupancy during replay. An optional field is provided for
+// the instruction PC.
+message InstDepRecord {
+  required uint64 seq_num = 1;
+  required bool load = 2;
+  required bool store = 3;
+  optional uint64 addr = 4;
+  optional uint32 size = 5;
+  optional uint32 flags = 6;
+  repeated uint64 rob_dep = 7;
+  required uint64 comp_delay = 8;
+  repeated uint64 reg_dep = 9;
+  optional uint32 weight = 10;
+  optional uint64 pc = 11;
+}
diff --git a/src/proto/packet.proto b/src/proto/packet.proto
index d27599691..c07206742 100644
--- a/src/proto/packet.proto
+++ b/src/proto/packet.proto
@@ -55,6 +55,8 @@ message PacketHeader {
 // not, etc. An optional id field is added for generic use to identify
 // the packet or the "owner" of the packet. An example of the latter
 // is the sequential id of an instruction, or the master id etc.
+// An optional field for PC of the instruction for which this request is made
+// is provided.
 message Packet {
   required uint64 tick = 1;
   required uint32 cmd = 2;
@@ -62,4 +64,5 @@ message Packet {
   required uint32 size = 4;
   optional uint32 flags = 5;
   optional uint64 pkt_id = 6;
+  optional uint64 pc = 7;
 }