Move SimObject python files alongside the C++ and fix

the SConscript files so that only the objects that are
actually available in a given build are compiled in.
Remove a bunch of files that aren't used anymore.

--HG--
rename : src/python/m5/objects/AlphaTLB.py => src/arch/alpha/AlphaTLB.py
rename : src/python/m5/objects/SparcTLB.py => src/arch/sparc/SparcTLB.py
rename : src/python/m5/objects/BaseCPU.py => src/cpu/BaseCPU.py
rename : src/python/m5/objects/FuncUnit.py => src/cpu/FuncUnit.py
rename : src/python/m5/objects/IntrControl.py => src/cpu/IntrControl.py
rename : src/python/m5/objects/MemTest.py => src/cpu/memtest/MemTest.py
rename : src/python/m5/objects/FUPool.py => src/cpu/o3/FUPool.py
rename : src/python/m5/objects/FuncUnitConfig.py => src/cpu/o3/FuncUnitConfig.py
rename : src/python/m5/objects/O3CPU.py => src/cpu/o3/O3CPU.py
rename : src/python/m5/objects/OzoneCPU.py => src/cpu/ozone/OzoneCPU.py
rename : src/python/m5/objects/SimpleOzoneCPU.py => src/cpu/ozone/SimpleOzoneCPU.py
rename : src/python/m5/objects/BadDevice.py => src/dev/BadDevice.py
rename : src/python/m5/objects/Device.py => src/dev/Device.py
rename : src/python/m5/objects/DiskImage.py => src/dev/DiskImage.py
rename : src/python/m5/objects/Ethernet.py => src/dev/Ethernet.py
rename : src/python/m5/objects/Ide.py => src/dev/Ide.py
rename : src/python/m5/objects/Pci.py => src/dev/Pci.py
rename : src/python/m5/objects/Platform.py => src/dev/Platform.py
rename : src/python/m5/objects/SimConsole.py => src/dev/SimConsole.py
rename : src/python/m5/objects/SimpleDisk.py => src/dev/SimpleDisk.py
rename : src/python/m5/objects/Uart.py => src/dev/Uart.py
rename : src/python/m5/objects/AlphaConsole.py => src/dev/alpha/AlphaConsole.py
rename : src/python/m5/objects/Tsunami.py => src/dev/alpha/Tsunami.py
rename : src/python/m5/objects/T1000.py => src/dev/sparc/T1000.py
rename : src/python/m5/objects/Bridge.py => src/mem/Bridge.py
rename : src/python/m5/objects/Bus.py => src/mem/Bus.py
rename : src/python/m5/objects/MemObject.py => src/mem/MemObject.py
rename : src/python/m5/objects/PhysicalMemory.py => src/mem/PhysicalMemory.py
rename : src/python/m5/objects/BaseCache.py => src/mem/cache/BaseCache.py
rename : src/python/m5/objects/CoherenceProtocol.py => src/mem/cache/coherence/CoherenceProtocol.py
rename : src/python/m5/objects/Repl.py => src/mem/cache/tags/Repl.py
rename : src/python/m5/objects/Process.py => src/sim/Process.py
rename : src/python/m5/objects/Root.py => src/sim/Root.py
rename : src/python/m5/objects/System.py => src/sim/System.py
extra : convert_revision : 173f8764bafa8ef899198438fa5573874e407321

1 files changed, 0 insertions, 51 deletions

diff --git a/src/python/SConscript b/src/python/SConscript
index 562278aa0..66b852d25 100644
--- a/src/python/SConscript
+++ b/src/python/SConscript
@@ -60,54 +60,3 @@ SwigSource('m5.internal', 'swig/sim_object.i')
 SwigSource('m5.internal', 'swig/stats.i')
 SwigSource('m5.internal', 'swig/trace.i')
 PySource('m5.internal', 'm5/internal/__init__.py')
-
-SimObject('m5/objects/AlphaConsole.py')
-SimObject('m5/objects/AlphaTLB.py')
-SimObject('m5/objects/BadDevice.py')
-SimObject('m5/objects/BaseCPU.py')
-SimObject('m5/objects/BaseCache.py')
-SimObject('m5/objects/BaseHier.py')
-SimObject('m5/objects/BaseMem.py')
-SimObject('m5/objects/BaseMemory.py')
-SimObject('m5/objects/BranchPred.py')
-SimObject('m5/objects/Bridge.py')
-SimObject('m5/objects/Bus.py')
-SimObject('m5/objects/Checker.py')
-SimObject('m5/objects/CoherenceProtocol.py')
-SimObject('m5/objects/DRAMMemory.py')
-SimObject('m5/objects/Device.py')
-SimObject('m5/objects/DiskImage.py')
-SimObject('m5/objects/Ethernet.py')
-SimObject('m5/objects/FUPool.py')
-SimObject('m5/objects/FastCPU.py')
-#SimObject('m5/objects/FreebsdSystem.py')
-SimObject('m5/objects/FuncUnit.py')
-SimObject('m5/objects/FuncUnitConfig.py')
-SimObject('m5/objects/FunctionalMemory.py')
-SimObject('m5/objects/HierParams.py')
-SimObject('m5/objects/Ide.py')
-SimObject('m5/objects/IntrControl.py')
-SimObject('m5/objects/LinuxSystem.py')
-SimObject('m5/objects/MainMemory.py')
-SimObject('m5/objects/MemObject.py')
-SimObject('m5/objects/MemTest.py')
-SimObject('m5/objects/MemoryController.py')
-SimObject('m5/objects/O3CPU.py')
-SimObject('m5/objects/OzoneCPU.py')
-SimObject('m5/objects/Pci.py')
-SimObject('m5/objects/PhysicalMemory.py')
-SimObject('m5/objects/Platform.py')
-SimObject('m5/objects/Process.py')
-SimObject('m5/objects/Repl.py')
-SimObject('m5/objects/Root.py')
-SimObject('m5/objects/Sampler.py')
-SimObject('m5/objects/SimConsole.py')
-SimObject('m5/objects/SimpleCPU.py')
-SimObject('m5/objects/SimpleDisk.py')
-#SimObject('m5/objects/SimpleOzoneCPU.py')
-SimObject('m5/objects/SparcTLB.py')
-SimObject('m5/objects/System.py')
-SimObject('m5/objects/T1000.py')
-#SimObject('m5/objects/Tru64System.py')
-SimObject('m5/objects/Tsunami.py')
-SimObject('m5/objects/Uart.py')