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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-05-31 20:45:04 +0000 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-05-31 20:45:04 +0000 |
| commit | c432588981c2903fda4b00bf03ada3c2c04063f7 (patch) | |
| tree | 6230df1fe2f4032ef76973f8debcccfed6830285 /src/python/SConscript | |
| parent | 62fde97bb2e40002e59d0185db419f6f72643a6f (diff) | |
| parent | 6b6de8aaae86ea8b0f416a175c547fc67bea804a (diff) | |
| download | gem5-c432588981c2903fda4b00bf03ada3c2c04063f7.tar.xz | |
Merge zizzer.eecs.umich.edu:/bk/newmem
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
src/cpu/simple/base.cc:
Hand merge
--HG--
extra : convert_revision : a2902ef9d917d22ffb9c7dfa2fd444694a65240d
Diffstat (limited to 'src/python/SConscript')
| -rw-r--r-- | src/python/SConscript | 51 |
1 files changed, 0 insertions, 51 deletions
diff --git a/src/python/SConscript b/src/python/SConscript index 562278aa0..66b852d25 100644 --- a/src/python/SConscript +++ b/src/python/SConscript @@ -60,54 +60,3 @@ SwigSource('m5.internal', 'swig/sim_object.i') SwigSource('m5.internal', 'swig/stats.i') SwigSource('m5.internal', 'swig/trace.i') PySource('m5.internal', 'm5/internal/__init__.py') - -SimObject('m5/objects/AlphaConsole.py') -SimObject('m5/objects/AlphaTLB.py') -SimObject('m5/objects/BadDevice.py') -SimObject('m5/objects/BaseCPU.py') -SimObject('m5/objects/BaseCache.py') -SimObject('m5/objects/BaseHier.py') -SimObject('m5/objects/BaseMem.py') -SimObject('m5/objects/BaseMemory.py') -SimObject('m5/objects/BranchPred.py') -SimObject('m5/objects/Bridge.py') -SimObject('m5/objects/Bus.py') -SimObject('m5/objects/Checker.py') -SimObject('m5/objects/CoherenceProtocol.py') -SimObject('m5/objects/DRAMMemory.py') -SimObject('m5/objects/Device.py') -SimObject('m5/objects/DiskImage.py') -SimObject('m5/objects/Ethernet.py') -SimObject('m5/objects/FUPool.py') -SimObject('m5/objects/FastCPU.py') -#SimObject('m5/objects/FreebsdSystem.py') -SimObject('m5/objects/FuncUnit.py') -SimObject('m5/objects/FuncUnitConfig.py') -SimObject('m5/objects/FunctionalMemory.py') -SimObject('m5/objects/HierParams.py') -SimObject('m5/objects/Ide.py') -SimObject('m5/objects/IntrControl.py') -SimObject('m5/objects/LinuxSystem.py') -SimObject('m5/objects/MainMemory.py') -SimObject('m5/objects/MemObject.py') -SimObject('m5/objects/MemTest.py') -SimObject('m5/objects/MemoryController.py') -SimObject('m5/objects/O3CPU.py') -SimObject('m5/objects/OzoneCPU.py') -SimObject('m5/objects/Pci.py') -SimObject('m5/objects/PhysicalMemory.py') -SimObject('m5/objects/Platform.py') -SimObject('m5/objects/Process.py') -SimObject('m5/objects/Repl.py') -SimObject('m5/objects/Root.py') -SimObject('m5/objects/Sampler.py') -SimObject('m5/objects/SimConsole.py') -SimObject('m5/objects/SimpleCPU.py') -SimObject('m5/objects/SimpleDisk.py') -#SimObject('m5/objects/SimpleOzoneCPU.py') -SimObject('m5/objects/SparcTLB.py') -SimObject('m5/objects/System.py') -SimObject('m5/objects/T1000.py') -#SimObject('m5/objects/Tru64System.py') -SimObject('m5/objects/Tsunami.py') -SimObject('m5/objects/Uart.py') |