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| author | Steve Reinhardt <steve.reinhardt@amd.com> | 2010-08-17 05:08:50 -0700 |
|---|---|---|
| committer | Steve Reinhardt <steve.reinhardt@amd.com> | 2010-08-17 05:08:50 -0700 |
| commit | 5ea906ba1625266ee80968d70e0c218adedcce9f (patch) | |
| tree | a28387572527f0dac40d677a8320b797dcc2a137 /src/python/m5/core.py | |
| parent | c2cce96a0bb4878a9e6a4ae635096b5ce62e41c3 (diff) | |
| download | gem5-5ea906ba1625266ee80968d70e0c218adedcce9f.tar.xz | |
sim: move iterating over SimObjects into Python.
Diffstat (limited to 'src/python/m5/core.py')
| -rw-r--r-- | src/python/m5/core.py | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/src/python/m5/core.py b/src/python/m5/core.py index 1d7985be6..8fa3d6fac 100644 --- a/src/python/m5/core.py +++ b/src/python/m5/core.py @@ -27,14 +27,6 @@ # Authors: Nathan Binkert import internal -from internal.core import initAll, regAllStats def setOutputDir(dir): internal.core.setOutputDir(dir) - -def initAll(): - internal.core.initAll() - -def regAllStats(): - internal.core.regAllStats() - |