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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-03-06 20:58:44 +0000 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-03-06 20:58:44 +0000 |
| commit | 44f91bb4443ed55a8e75096f1a821fd7605b7771 (patch) | |
| tree | 39ffcc423e52760b67a9b7984fe2d652f56e8c92 /src/python/m5/objects/BaseCPU.py | |
| parent | 05c86ec0d7662ccefc5690a4445fcf2976d16622 (diff) | |
| parent | 329db76e47c825d4ecbe0f5251dbcfaf2ec09516 (diff) | |
| download | gem5-44f91bb4443ed55a8e75096f1a821fd7605b7771.tar.xz | |
Merge zizzer.eecs.umich.edu:/bk/newmem
into ahchoo.blinky.homelinux.org:/home/gblack/m5/newmem-x86
--HG--
extra : convert_revision : 0822fbcc377781b53d2de9ba40ab9d985ccbc039
Diffstat (limited to 'src/python/m5/objects/BaseCPU.py')
| -rw-r--r-- | src/python/m5/objects/BaseCPU.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/python/m5/objects/BaseCPU.py b/src/python/m5/objects/BaseCPU.py index 67a28a61e..986220c3f 100644 --- a/src/python/m5/objects/BaseCPU.py +++ b/src/python/m5/objects/BaseCPU.py @@ -47,8 +47,8 @@ class BaseCPU(SimObject): defer_registration = Param.Bool(False, "defer registration with system (for sampling)") - clock = Param.Clock(Parent.clock, "clock speed") - phase = Param.Latency("0ns", "clock phase") + clock = Param.Clock('1t', "clock speed") + phase = Param.Latency('0ns', "clock phase") _mem_ports = [] |