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| author | Kevin Lim <ktlim@umich.edu> | 2006-10-09 22:59:56 -0400 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-10-09 22:59:56 -0400 |
| commit | bdde892d668e17fb5a67de0e560a85b9092adf9e (patch) | |
| tree | 3876a98dcd7f80aca7bf7e2153dbaa32c83a15b5 /src/python/m5/objects/BaseCPU.py | |
| parent | a9ae6c8656dc233996c81cdeb6f5c8539442af95 (diff) | |
| parent | 5448517da4cd13e3c8438850f04367d9614d686b (diff) | |
| download | gem5-bdde892d668e17fb5a67de0e560a85b9092adf9e.tar.xz | |
Merge ktlim@zizzer:/bk/newmem
into zamp.eecs.umich.edu:/z/ktlim2/clean/o3-merge/newmem
src/cpu/memtest/memtest.cc:
src/cpu/memtest/memtest.hh:
src/cpu/simple/timing.hh:
tests/configs/o3-timing-mp.py:
Hand merge.
--HG--
extra : convert_revision : a58cc439eb5e8f900d175ed8b5a85b6c8723e558
Diffstat (limited to 'src/python/m5/objects/BaseCPU.py')
| -rw-r--r-- | src/python/m5/objects/BaseCPU.py | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/python/m5/objects/BaseCPU.py b/src/python/m5/objects/BaseCPU.py index 0b887cceb..b6dc08e46 100644 --- a/src/python/m5/objects/BaseCPU.py +++ b/src/python/m5/objects/BaseCPU.py @@ -11,10 +11,11 @@ class BaseCPU(SimObject): mem = Param.MemObject("memory") system = Param.System(Parent.any, "system object") + cpu_id = Param.Int("CPU identifier") + if build_env['FULL_SYSTEM']: dtb = Param.AlphaDTB(AlphaDTB(), "Data TLB") itb = Param.AlphaITB(AlphaITB(), "Instruction TLB") - cpu_id = Param.Int(-1, "CPU identifier") else: workload = VectorParam.Process("processes to run") |