diff options
author | Ali Saidi <saidi@eecs.umich.edu> | 2007-01-25 13:43:46 -0500 |
---|---|---|
committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-01-25 13:43:46 -0500 |
commit | 8561c8366c7c9afd7e6b52b6e2385b3c1dde95a9 (patch) | |
tree | 1bdc9fe154849d32ad58beb882f465fd8c2a70bd /src/python/m5/objects/Device.py | |
parent | 4301e4cd08018eb56b4f196afcce9a8311f390b4 (diff) | |
download | gem5-8561c8366c7c9afd7e6b52b6e2385b3c1dde95a9.tar.xz |
fix smul and sdiv to sign extend, and handle overflow/underflow corretly
Only allow writing/reading of 32 bits of Y
Only allow writing/reading 32 bits of pc when pstate.am
Put any loaded data on the first half of a micro-op in uReg0 so it can't
overwrite the register we are using for address calculation
only erase a entry from the lookup table if it's valid
Put in a temporary check to make sure that lookup table and tlb array stay in sync
if we are interrupted in the middle of a mico-op, reset the micropc/nexpc
so we start on the first part of it when we come back
src/arch/sparc/isa/decoder.isa:
fix smul and sdiv to sign extend, and handle overflow/underflow corretly
Only allow writing/reading of 32 bits of Y
Only allow writing/reading 32 bits of pc when pstate.am
Put any loaded data on the first half of a micro-op in uReg0 so it can't
overwrite the register we are using for address calculation
src/arch/sparc/isa/formats/mem/blockmem.isa:
Put any loaded data on the first half of a micro-op in uReg0 so it can't
overwrite the register we are using for address calculation
src/arch/sparc/isa/includes.isa:
Use limits for 32bit underflow/overflow detection
src/arch/sparc/tlb.cc:
only erase a entry from the lookup table if it's valid
Put in a temporary check to make sure that lookup table and tlb array stay in sync
src/arch/sparc/tlb_map.hh:
add a print function to dump the tlb lookup table
src/cpu/simple/base.cc:
if we are interrupted in the middle of a mico-op, reset the micropc/nexpc
so we start on the first part of it when we come back
--HG--
extra : convert_revision : 50a23837fd888393a5c2aa35cbd1abeebb7f55d4
Diffstat (limited to 'src/python/m5/objects/Device.py')
0 files changed, 0 insertions, 0 deletions