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authorGabe Black <gblack@eecs.umich.edu>2006-06-12 00:49:24 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-06-12 00:49:24 -0400
commit15a8f050605919579e81b6abb98a0b596334216d (patch)
tree583b0b30f13d9874a69015d58d041ce2d7352960 /src/python/m5/objects/IntrControl.py
parent60a734e1750f3c051fe92fea6f12158db6e2dcb9 (diff)
parentdf4b4f001e4db902297acf3b75480e4886e4e882 (diff)
downloadgem5-15a8f050605919579e81b6abb98a0b596334216d.tar.xz
Merge m5.eecs.umich.edu:/bk/newmem
into ewok.(none):/home/gblack/m5/newmem src/arch/sparc/regfile.hh: Hand Merge --HG-- extra : convert_revision : c47202689202069892524a7d71962082469996ee
Diffstat (limited to 'src/python/m5/objects/IntrControl.py')
-rw-r--r--src/python/m5/objects/IntrControl.py2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/python/m5/objects/IntrControl.py b/src/python/m5/objects/IntrControl.py
index 66c82c182..514c3fc62 100644
--- a/src/python/m5/objects/IntrControl.py
+++ b/src/python/m5/objects/IntrControl.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
class IntrControl(SimObject):
type = 'IntrControl'
cpu = Param.BaseCPU(Parent.any, "the cpu")