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| author | Ali Saidi <saidi@eecs.umich.edu> | 2006-07-19 17:59:04 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2006-07-19 17:59:04 -0400 |
| commit | 15e5ce96c76a20b9b27e5f7d7ed29e962422ad1a (patch) | |
| tree | 610a888b2de5d25c166f65819d8ad3058d13723c /src/python/m5/objects/Pci.py | |
| parent | b36796914af8bfc6729cc8a519e57572460e43e8 (diff) | |
| parent | 6175f712b3216f3e5387b07d9c41c1931c09acd9 (diff) | |
| download | gem5-15e5ce96c76a20b9b27e5f7d7ed29e962422ad1a.tar.xz | |
Merge zizzer:/bk/newmem
into zeep.pool:/z/saidi/work/m5.newmem.head
--HG--
extra : convert_revision : 8c747208d72ffbb0160a2ad4a75383420debdf83
Diffstat (limited to 'src/python/m5/objects/Pci.py')
| -rw-r--r-- | src/python/m5/objects/Pci.py | 12 |
1 files changed, 8 insertions, 4 deletions
diff --git a/src/python/m5/objects/Pci.py b/src/python/m5/objects/Pci.py index 9e1e91b13..cc0d1cf4a 100644 --- a/src/python/m5/objects/Pci.py +++ b/src/python/m5/objects/Pci.py @@ -1,5 +1,5 @@ from m5.config import * -from Device import BasicPioDevice, DmaDevice +from Device import BasicPioDevice, DmaDevice, PioDevice class PciConfigData(SimObject): type = 'PciConfigData' @@ -38,18 +38,22 @@ class PciConfigData(SimObject): MaximumLatency = Param.UInt8(0x00, "Maximum Latency") MinimumGrant = Param.UInt8(0x00, "Minimum Grant") -class PciConfigAll(BasicPioDevice): +class PciConfigAll(PioDevice): type = 'PciConfigAll' + pio_latency = Param.Tick(1, "Programmed IO latency in simticks") + bus = Param.UInt8(0x00, "PCI bus to act as config space for") + size = Param.MemorySize32('16MB', "Size of config space") + class PciDevice(DmaDevice): type = 'PciDevice' abstract = True + config = Port("PCI configuration space port") pci_bus = Param.Int("PCI bus") pci_dev = Param.Int("PCI device number") pci_func = Param.Int("PCI function code") - pio_latency = Param.Tick(1, "Programmed IO latency in simticks") + pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks") configdata = Param.PciConfigData(Parent.any, "PCI Config data") - configspace = Param.PciConfigAll(Parent.any, "PCI Configspace") class PciFake(PciDevice): type = 'PciFake' |