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authorAli Saidi <saidi@eecs.umich.edu>2006-09-18 20:12:45 -0400
committerAli Saidi <saidi@eecs.umich.edu>2006-09-18 20:12:45 -0400
commit17b0e9714d4bde7462d4663899bb9498027f6b40 (patch)
tree464a837d850eb8e076e62d9a6926e9e57516b9d9 /src/python/m5/objects/Pci.py
parentb7d03951268d352254b918fbe1464954828ee8fd (diff)
downloadgem5-17b0e9714d4bde7462d4663899bb9498027f6b40.tar.xz
add boiler plate intel nic code
src/SConscript: add intel nic to sconscript src/dev/pcidev.cc: fix bug with subsystemid value src/python/m5/objects/Ethernet.py: add intel nic to ethernet.py src/python/m5/objects/Ide.py: src/python/m5/objects/Pci.py: Move config_latency into pci where it belogs --HG-- extra : convert_revision : 7163aaf7b4098496518b0910cef62f2ce3dd574d
Diffstat (limited to 'src/python/m5/objects/Pci.py')
-rw-r--r--src/python/m5/objects/Pci.py1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/python/m5/objects/Pci.py b/src/python/m5/objects/Pci.py
index 9872532ab..55bf23534 100644
--- a/src/python/m5/objects/Pci.py
+++ b/src/python/m5/objects/Pci.py
@@ -56,6 +56,7 @@ class PciDevice(DmaDevice):
pci_func = Param.Int("PCI function code")
pio_latency = Param.Latency('1ns', "Programmed IO latency in simticks")
configdata = Param.PciConfigData(Parent.any, "PCI Config data")
+ config_latency = Param.Latency('20ns', "Config read or write latency")
class PciFake(PciDevice):
type = 'PciFake'