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authorKorey Sewell <ksewell@umich.edu>2006-06-30 20:51:07 -0400
committerKorey Sewell <ksewell@umich.edu>2006-06-30 20:51:07 -0400
commited821702e02b9c02c3b5f18dc61dad1f0fbc7164 (patch)
treee299605370852ed8331e512b92590f0fcd875f9d /src/python/m5/objects
parent7a4929813423c6f72827c58453cb9bd591f1801c (diff)
parent51261196bde3403544631cdb4895c2d2a51c3f1e (diff)
downloadgem5-ed821702e02b9c02c3b5f18dc61dad1f0fbc7164.tar.xz
Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/newmem
into zizzer.eecs.umich.edu:/.automount/zooks/y/ksewell/research/m5-sim/newmem-o3 --HG-- extra : convert_revision : 3c1405d8b4831c6240e02ba65a72043ca55f4a46
Diffstat (limited to 'src/python/m5/objects')
-rw-r--r--src/python/m5/objects/O3CPU.py (renamed from src/python/m5/objects/AlphaO3CPU.py)4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/python/m5/objects/AlphaO3CPU.py b/src/python/m5/objects/O3CPU.py
index f14f8c88e..4ecfa8fbd 100644
--- a/src/python/m5/objects/AlphaO3CPU.py
+++ b/src/python/m5/objects/O3CPU.py
@@ -2,8 +2,8 @@ from m5 import build_env
from m5.config import *
from BaseCPU import BaseCPU
-class DerivAlphaO3CPU(BaseCPU):
- type = 'DerivAlphaO3CPU'
+class DerivO3CPU(BaseCPU):
+ type = 'DerivO3CPU'
activity = Param.Unsigned("Initial count")
numThreads = Param.Unsigned("number of HW thread contexts")