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| author | Kevin Lim <ktlim@umich.edu> | 2006-07-14 17:54:43 -0400 |
|---|---|---|
| committer | Kevin Lim <ktlim@umich.edu> | 2006-07-14 17:54:43 -0400 |
| commit | 31ac8e733765ee37411d92ea3b7c308affef087a (patch) | |
| tree | f2b677c660d83978d9a9a83ca934c3d9bb1215ba /src/python/m5/objects | |
| parent | 138a4faf2894ff7d22585b8398ae87f8e6aad9a1 (diff) | |
| parent | 07186de5a1b1df55a31329b2ca9c53ad168438ff (diff) | |
| download | gem5-31ac8e733765ee37411d92ea3b7c308affef087a.tar.xz | |
Merge ktlim@zizzer:/bk/newmem
into zamp.eecs.umich.edu:/z/ktlim2/clean/newmem-merge
configs/test/fs.py:
configs/test/test.py:
SCCS merged
--HG--
extra : convert_revision : 7b2dbcd5881fac01dec38001c4131e73b5be52b5
Diffstat (limited to 'src/python/m5/objects')
| -rw-r--r-- | src/python/m5/objects/BaseCPU.py | 2 | ||||
| -rw-r--r-- | src/python/m5/objects/System.py | 3 |
2 files changed, 4 insertions, 1 deletions
diff --git a/src/python/m5/objects/BaseCPU.py b/src/python/m5/objects/BaseCPU.py index 2e78578df..5bf98be9c 100644 --- a/src/python/m5/objects/BaseCPU.py +++ b/src/python/m5/objects/BaseCPU.py @@ -6,10 +6,10 @@ class BaseCPU(SimObject): abstract = True mem = Param.MemObject("memory") + system = Param.System(Parent.any, "system object") if build_env['FULL_SYSTEM']: dtb = Param.AlphaDTB("Data TLB") itb = Param.AlphaITB("Instruction TLB") - system = Param.System(Parent.any, "system object") cpu_id = Param.Int(-1, "CPU identifier") else: workload = VectorParam.Process("processes to run") diff --git a/src/python/m5/objects/System.py b/src/python/m5/objects/System.py index 9a1e1d690..386f39277 100644 --- a/src/python/m5/objects/System.py +++ b/src/python/m5/objects/System.py @@ -1,9 +1,12 @@ from m5 import build_env from m5.config import * +class MemoryMode(Enum): vals = ['invalid', 'atomic', 'timing'] + class System(SimObject): type = 'System' physmem = Param.PhysicalMemory(Parent.any, "phsyical memory") + mem_mode = Param.MemoryMode('atomic', "The mode the memory system is in") if build_env['FULL_SYSTEM']: boot_cpu_frequency = Param.Frequency(Self.cpu[0].clock.frequency, "boot processor frequency") |