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authorSteve Reinhardt <stever@eecs.umich.edu>2006-06-13 23:19:42 -0400
committerSteve Reinhardt <stever@eecs.umich.edu>2006-06-13 23:19:42 -0400
commit185ec39f792386d8b30f3288f2c2e4eaf0b43d02 (patch)
treebd06995cf95f7085d4c328fed2f1cec2aec1a01a /src/python/m5/objects
parent7709e6ba93be4b67b22e2f3f9c853a3e1ab4458b (diff)
parente981a97dec3df921f3800fd9ae5ec01ed4e9d2b1 (diff)
downloadgem5-185ec39f792386d8b30f3288f2c2e4eaf0b43d02.tar.xz
Merge zizzer:/bk/newmem
into vm1.(none):/home/stever/bk/newmem --HG-- extra : convert_revision : 6ebb12890c516a11733a04041f29c9964267a5ca
Diffstat (limited to 'src/python/m5/objects')
-rw-r--r--src/python/m5/objects/Bus.py1
-rw-r--r--src/python/m5/objects/PhysicalMemory.py1
2 files changed, 2 insertions, 0 deletions
diff --git a/src/python/m5/objects/Bus.py b/src/python/m5/objects/Bus.py
index c37dab438..019e15034 100644
--- a/src/python/m5/objects/Bus.py
+++ b/src/python/m5/objects/Bus.py
@@ -3,4 +3,5 @@ from MemObject import MemObject
class Bus(MemObject):
type = 'Bus'
+ port = VectorPort("vector port for connecting devices")
bus_id = Param.Int(0, "blah")
diff --git a/src/python/m5/objects/PhysicalMemory.py b/src/python/m5/objects/PhysicalMemory.py
index bed90d555..9cc7510a2 100644
--- a/src/python/m5/objects/PhysicalMemory.py
+++ b/src/python/m5/objects/PhysicalMemory.py
@@ -3,6 +3,7 @@ from MemObject import *
class PhysicalMemory(MemObject):
type = 'PhysicalMemory'
+ port = Port("the access port")
range = Param.AddrRange("Device Address")
file = Param.String('', "memory mapped file")
latency = Param.Latency(Parent.clock, "latency of an access")