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authorLisa Hsu <hsul@eecs.umich.edu>2006-12-15 13:05:46 -0500
committerLisa Hsu <hsul@eecs.umich.edu>2006-12-15 13:05:46 -0500
commit573d59441e420f02fd7cf3e31158258f5eee3ab1 (patch)
treec7482a9e1efe17597333dbd84b7439b87c4c6118 /src/python/m5/params.py
parentfbc796b3479abdf86b8f8fe7197f6280cf7ce453 (diff)
downloadgem5-573d59441e420f02fd7cf3e31158258f5eee3ab1.tar.xz
some small general fixes to make everythign work nicely with other ISAs, now we can merge back with newmem.
exetrace.cc: wrap this variable between FULL_SYSTEM #ifs mmaped_ipr.hh: fix for build miscregfile.cc: fixes for HPSTATE access during SE mode src/arch/sparc/miscregfile.cc: fixes for HPSTATE access during SE mode src/arch/mips/mmaped_ipr.hh: fix for build src/cpu/exetrace.cc: wrap this variable between FULL_SYSTEM #ifs --HG-- extra : convert_revision : c5b9d56ab99018a91d04de47ba1d5ca7768590bb
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