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authorGabe Black <gblack@eecs.umich.edu>2007-08-02 23:30:25 -0700
committerGabe Black <gblack@eecs.umich.edu>2007-08-02 23:30:25 -0700
commit121a894ce0d551e860392f9aa6bd381329a25b96 (patch)
tree3e8b7ded2869c14eb45403a15100d45d247f401b /src/python/m5/simulate.py
parentf4b89cd897e15b34f1565f55d7c6ce0c056f361a (diff)
parent0536d0cde931e89d33b10228950d455dd54d8a5f (diff)
downloadgem5-121a894ce0d551e860392f9aa6bd381329a25b96.tar.xz
Merge with head.
--HG-- extra : convert_revision : c8b066289916b3fb24bcae1e9c76e27ad4cf61b1
Diffstat (limited to 'src/python/m5/simulate.py')
-rw-r--r--src/python/m5/simulate.py16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/python/m5/simulate.py b/src/python/m5/simulate.py
index ba9fb7899..c703664d4 100644
--- a/src/python/m5/simulate.py
+++ b/src/python/m5/simulate.py
@@ -59,10 +59,10 @@ def instantiate(root):
root.connectPorts()
# Do a second pass to finish initializing the sim objects
- internal.sim_object.initAll()
+ internal.core.initAll()
# Do a third pass to initialize statistics
- internal.sim_object.regAllStats()
+ internal.core.regAllStats()
# Check to make sure that the stats package is properly initialized
internal.stats.check()
@@ -136,32 +136,32 @@ def checkpoint(root, dir):
raise TypeError, "Checkpoint must be called on a root object."
doDrain(root)
print "Writing checkpoint"
- internal.sim_object.serializeAll(dir)
+ internal.core.serializeAll(dir)
resume(root)
def restoreCheckpoint(root, dir):
print "Restoring from checkpoint"
- internal.sim_object.unserializeAll(dir)
+ internal.core.unserializeAll(dir)
need_resume.append(root)
def changeToAtomic(system):
if not isinstance(system, (objects.Root, objects.System)):
raise TypeError, "Parameter of type '%s'. Must be type %s or %s." % \
(type(system), objects.Root, objects.System)
- if system.getMemoryMode() != internal.sim_object.SimObject.Atomic:
+ if system.getMemoryMode() != objects.params.SimObject.Atomic:
doDrain(system)
print "Changing memory mode to atomic"
- system.changeTiming(internal.sim_object.SimObject.Atomic)
+ system.changeTiming(objects.params.SimObject.Atomic)
def changeToTiming(system):
if not isinstance(system, (objects.Root, objects.System)):
raise TypeError, "Parameter of type '%s'. Must be type %s or %s." % \
(type(system), objects.Root, objects.System)
- if system.getMemoryMode() != internal.sim_object.SimObject.Timing:
+ if system.getMemoryMode() != objects.params.SimObject.Timing:
doDrain(system)
print "Changing memory mode to timing"
- system.changeTiming(internal.sim_object.SimObject.Timing)
+ system.changeTiming(objects.params.SimObject.Timing)
def switchCpus(cpuList):
print "switching cpus"