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| author | Andreas Sandberg <Andreas.Sandberg@arm.com> | 2012-09-25 11:49:40 -0500 |
|---|---|---|
| committer | Andreas Sandberg <Andreas.Sandberg@arm.com> | 2012-09-25 11:49:40 -0500 |
| commit | 6598241f2c188ba6f4ce035d9e1fbdd4619c7e00 (patch) | |
| tree | a9785f2f7fd62f92916eb8f3900ad0427b96396d /src/python/m5/simulate.py | |
| parent | 5f32eceeda92f45d253a0835c6643e786a91ba49 (diff) | |
| download | gem5-6598241f2c188ba6f4ce035d9e1fbdd4619c7e00.tar.xz | |
sim: Move CPU-specific methods from SimObject to the BaseCPU class
Diffstat (limited to 'src/python/m5/simulate.py')
| -rw-r--r-- | src/python/m5/simulate.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/python/m5/simulate.py b/src/python/m5/simulate.py index 17150cd4f..e95136548 100644 --- a/src/python/m5/simulate.py +++ b/src/python/m5/simulate.py @@ -221,7 +221,7 @@ def switchCpus(cpuList): # Now all of the CPUs are ready to be switched out for old_cpu, new_cpu in cpuList: - old_cpu._ccObject.switchOut() + old_cpu.switchOut() for old_cpu, new_cpu in cpuList: new_cpu.takeOverFrom(old_cpu) |