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authorNathan Binkert <nate@binkert.org>2007-08-02 22:50:02 -0700
committerNathan Binkert <nate@binkert.org>2007-08-02 22:50:02 -0700
commit0536d0cde931e89d33b10228950d455dd54d8a5f (patch)
treee4d8335f239b5216942768a48d6879f184182f6c /src/python/m5/simulate.py
parentdc7a38dce785cf0deabb35022bb2dbfc1cc8ea3a (diff)
downloadgem5-0536d0cde931e89d33b10228950d455dd54d8a5f.tar.xz
python: Improve support for python calling back to C++ member functions.
Add support for declaring SimObjects to swig so their members can be wrapped. Make sim_object.i only contain declarations for SimObject. Create system.i to contain declarations for System. Update python code to properly call the C++ given the new changes. --HG-- extra : convert_revision : 82076ee69e8122d56e91b92d6767e356baae420a
Diffstat (limited to 'src/python/m5/simulate.py')
-rw-r--r--src/python/m5/simulate.py16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/python/m5/simulate.py b/src/python/m5/simulate.py
index ba9fb7899..c703664d4 100644
--- a/src/python/m5/simulate.py
+++ b/src/python/m5/simulate.py
@@ -59,10 +59,10 @@ def instantiate(root):
root.connectPorts()
# Do a second pass to finish initializing the sim objects
- internal.sim_object.initAll()
+ internal.core.initAll()
# Do a third pass to initialize statistics
- internal.sim_object.regAllStats()
+ internal.core.regAllStats()
# Check to make sure that the stats package is properly initialized
internal.stats.check()
@@ -136,32 +136,32 @@ def checkpoint(root, dir):
raise TypeError, "Checkpoint must be called on a root object."
doDrain(root)
print "Writing checkpoint"
- internal.sim_object.serializeAll(dir)
+ internal.core.serializeAll(dir)
resume(root)
def restoreCheckpoint(root, dir):
print "Restoring from checkpoint"
- internal.sim_object.unserializeAll(dir)
+ internal.core.unserializeAll(dir)
need_resume.append(root)
def changeToAtomic(system):
if not isinstance(system, (objects.Root, objects.System)):
raise TypeError, "Parameter of type '%s'. Must be type %s or %s." % \
(type(system), objects.Root, objects.System)
- if system.getMemoryMode() != internal.sim_object.SimObject.Atomic:
+ if system.getMemoryMode() != objects.params.SimObject.Atomic:
doDrain(system)
print "Changing memory mode to atomic"
- system.changeTiming(internal.sim_object.SimObject.Atomic)
+ system.changeTiming(objects.params.SimObject.Atomic)
def changeToTiming(system):
if not isinstance(system, (objects.Root, objects.System)):
raise TypeError, "Parameter of type '%s'. Must be type %s or %s." % \
(type(system), objects.Root, objects.System)
- if system.getMemoryMode() != internal.sim_object.SimObject.Timing:
+ if system.getMemoryMode() != objects.params.SimObject.Timing:
doDrain(system)
print "Changing memory mode to timing"
- system.changeTiming(internal.sim_object.SimObject.Timing)
+ system.changeTiming(objects.params.SimObject.Timing)
def switchCpus(cpuList):
print "switching cpus"