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author | Gabe Black <gblack@eecs.umich.edu> | 2006-08-11 20:21:35 -0400 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-08-11 20:21:35 -0400 |
commit | ec26f0bb3d3d0af9dc87e5e3f25c2b90f2db0332 (patch) | |
tree | f4f1307f30e0941f448087992db77562d9f7330c /src/python/m5 | |
parent | 800e6ecc07d01c49808cc4f9597d94cc8cfd9fae (diff) | |
download | gem5-ec26f0bb3d3d0af9dc87e5e3f25c2b90f2db0332.tar.xz |
Started adding a system to output data after every instruction.
src/arch/alpha/regfile.hh:
src/arch/mips/regfile/float_regfile.hh:
src/arch/mips/regfile/int_regfile.hh:
src/arch/mips/regfile/misc_regfile.hh:
src/cpu/exetrace.hh:
Added functions to start to support dumping register values once per cycle.
src/cpu/exetrace.cc:
Added some code to support printing the value of registers after each cycle.
src/python/m5/main.py:
Options to turn on output after every instruction. They are commented out.
--HG--
extra : convert_revision : 168a48a6b98ab6be412a96bdee831c71906958b0
Diffstat (limited to 'src/python/m5')
-rw-r--r-- | src/python/m5/main.py | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/python/m5/main.py b/src/python/m5/main.py index 293c4dbca..e296453db 100644 --- a/src/python/m5/main.py +++ b/src/python/m5/main.py @@ -177,6 +177,8 @@ bool_option("print-fetch-seq", default=False, help="Print fetch sequence numbers in trace output") bool_option("print-cpseq", default=False, help="Print correct path sequence numbers in trace output") +#bool_option("print-reg-delta", default=False, +# help="Print which registers changed to what in trace output") options = attrdict() arguments = [] @@ -290,6 +292,7 @@ def main(): objects.ExecutionTrace.print_iregs = options.print_iregs objects.ExecutionTrace.print_fetchseq = options.print_fetch_seq objects.ExecutionTrace.print_cpseq = options.print_cpseq + #objects.ExecutionTrace.print_reg_delta = options.print_reg_delta sys.argv = arguments sys.path = [ os.path.dirname(sys.argv[0]) ] + sys.path |