diff options
| author | Ron Dreslinski <rdreslin@umich.edu> | 2006-10-09 17:13:50 -0400 |
|---|---|---|
| committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-10-09 17:13:50 -0400 |
| commit | b9fb4d4870dd45c552fd4cd5e531e9626754f19f (patch) | |
| tree | 3a762d373464c3af4bfdb4787369612f43bfe067 /src/python/m5 | |
| parent | d7c1557e7e731809ede765ade80d0db748afda4b (diff) | |
| download | gem5-b9fb4d4870dd45c552fd4cd5e531e9626754f19f.tar.xz | |
Make memtest work with 8 memtesters
src/mem/physical.cc:
Update comment to match memtest use
src/python/m5/objects/PhysicalMemory.py:
Make memtester have a way to connect functionally
tests/configs/memtest.py:
Properly create 8 memtesters and connect them to the memory system
--HG--
extra : convert_revision : e5a2dd9c8918d58051b553b5c6a14785d48b34ca
Diffstat (limited to 'src/python/m5')
| -rw-r--r-- | src/python/m5/objects/PhysicalMemory.py | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/python/m5/objects/PhysicalMemory.py b/src/python/m5/objects/PhysicalMemory.py index dd3ffd651..4e097543d 100644 --- a/src/python/m5/objects/PhysicalMemory.py +++ b/src/python/m5/objects/PhysicalMemory.py @@ -5,6 +5,7 @@ from MemObject import * class PhysicalMemory(MemObject): type = 'PhysicalMemory' port = Port("the access port") + functional = Port("Functional Access Port") range = Param.AddrRange(AddrRange('128MB'), "Device Address") file = Param.String('', "memory mapped file") latency = Param.Latency(Parent.clock, "latency of an access") |