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author | Gabe Black <gblack@eecs.umich.edu> | 2006-10-08 18:44:49 -0400 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-10-08 18:44:49 -0400 |
commit | a82f017591ecb78cb098e38314d87d64fcaaa37f (patch) | |
tree | 3937e3900126dc2052de8e4bb2afcce9da180628 /src/python/m5 | |
parent | 63023ba4c21e293e93d799815b94f41024da0f97 (diff) | |
download | gem5-a82f017591ecb78cb098e38314d87d64fcaaa37f.tar.xz |
bus changes
src/mem/bus.cc:
src/mem/bus.hh:
minor fix and some formatting changes
src/python/m5/objects/Bus.py:
changed bits to bytes
--HG--
extra : convert_revision : dcd22205604b7a2727eaf2094084c4858f3589c5
Diffstat (limited to 'src/python/m5')
-rw-r--r-- | src/python/m5/objects/Bus.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/python/m5/objects/Bus.py b/src/python/m5/objects/Bus.py index b7c55990c..6710111e5 100644 --- a/src/python/m5/objects/Bus.py +++ b/src/python/m5/objects/Bus.py @@ -7,4 +7,4 @@ class Bus(MemObject): default = Port("Default port for requests that aren't handeled by a device.") bus_id = Param.Int(0, "blah") clock = Param.Clock("1GHz", "bus clock speed") - width = Param.Int(64, "bus width (bits)") + width = Param.Int(64, "bus width (bytes)") |