Merge vm1.(none):/home/stever/bk/newmem

into  vm1.(none):/home/stever/bk/newmem-py

src/python/m5/__init__.py:
src/sim/syscall_emul.cc:
    Hand merge.

--HG--
extra : convert_revision : e2542735323e648383c89382421d98a7d1d761bf

29 files changed, 92 insertions, 173 deletions

diff --git a/src/python/m5/__init__.py b/src/python/m5/__init__.py
index 4f29c55e8..60a61d66e 100644
--- a/src/python/m5/__init__.py
+++ b/src/python/m5/__init__.py
@@ -27,69 +27,26 @@
 # Authors: Nathan Binkert
 #          Steve Reinhardt
 
-import sys, os, time
+import sys, os, time, atexit, optparse
 
-import __main__
+# import the SWIG-wrapped main C++ functions
+import main
+# import a few SWIG-wrapped items (those that are likely to be used
+# directly by user scripts) completely into this module for
+# convenience
+from main import simulate, SimLoopExitEvent
 
-briefCopyright = '''
-Copyright (c) 2001-2006
-The Regents of The University of Michigan
-All Rights Reserved
-'''
-
-fullCopyright = '''
-Copyright (c) 2001-2006
-The Regents of The University of Michigan
-All Rights Reserved
-
-Permission is granted to use, copy, create derivative works and
-redistribute this software and such derivative works for any purpose,
-so long as the copyright notice above, this grant of permission, and
-the disclaimer below appear in all copies made; and so long as the
-name of The University of Michigan is not used in any advertising or
-publicity pertaining to the use or distribution of this software
-without specific, written prior authorization.
-
-THIS SOFTWARE IS PROVIDED AS IS, WITHOUT REPRESENTATION FROM THE
-UNIVERSITY OF MICHIGAN AS TO ITS FITNESS FOR ANY PURPOSE, AND WITHOUT
-WARRANTY BY THE UNIVERSITY OF MICHIGAN OF ANY KIND, EITHER EXPRESS OR
-IMPLIED, INCLUDING WITHOUT LIMITATION THE IMPLIED WARRANTIES OF
-MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE REGENTS OF
-THE UNIVERSITY OF MICHIGAN SHALL NOT BE LIABLE FOR ANY DAMAGES,
-INCLUDING DIRECT, SPECIAL, INDIRECT, INCIDENTAL, OR CONSEQUENTIAL
-DAMAGES, WITH RESPECT TO ANY CLAIM ARISING OUT OF OR IN CONNECTION
-WITH THE USE OF THE SOFTWARE, EVEN IF IT HAS BEEN OR IS HEREAFTER
-ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
-'''
-
-def sayHello(f):
-    print >> f, "M5 Simulator System"
-    print >> f, briefCopyright
-    print >> f, "M5 compiled on", __main__.compileDate
-    hostname = os.environ.get('HOSTNAME')
-    if not hostname:
-        hostname = os.environ.get('HOST')
-    if hostname:
-        print >> f, "M5 executing on", hostname
-    print >> f, "M5 simulation started", time.ctime()
-
-sayHello(sys.stderr)
+# import the m5 compile options
+import defines
 
 # define this here so we can use it right away if necessary
 def panic(string):
     print >>sys.stderr, 'panic:', string
     sys.exit(1)
 
-def m5execfile(f, global_dict):
-    # copy current sys.path
-    oldpath = sys.path[:]
-    # push file's directory onto front of path
-    sys.path.insert(0, os.path.abspath(os.path.dirname(f)))
-    execfile(f, global_dict)
-    # restore original path
-    sys.path = oldpath
-
-# Prepend given directory to system module search path.
+# Prepend given directory to system module search path.  We may not
+# need this anymore if we can structure our config library more like a
+# Python package.
 def AddToPath(path):
     # if it's a relative path and we know what directory the current
     # python script is in, make the path relative to that directory.
@@ -100,85 +57,58 @@ def AddToPath(path):
     # so place the new dir right after that.
     sys.path.insert(1, path)
 
-# find the m5 compile options: must be specified as a dict in
-# __main__.m5_build_env.
-import __main__
-if not hasattr(__main__, 'm5_build_env'):
-    panic("__main__ must define m5_build_env")
+
+# Callback to set trace flags.  Not necessarily the best way to do
+# things in the long run (particularly if we change how these global
+# options are handled).
+def setTraceFlags(option, opt_str, value, parser):
+    objects.Trace.flags = value
+
+# Standard optparse options.  Need to be explicitly included by the
+# user script when it calls optparse.OptionParser().
+standardOptions = [
+    optparse.make_option("--traceflags", type="string", action="callback",
+                         callback=setTraceFlags)
+    ]
 
 # make a SmartDict out of the build options for our local use
 import smartdict
 build_env = smartdict.SmartDict()
-build_env.update(__main__.m5_build_env)
+build_env.update(defines.m5_build_env)
 
 # make a SmartDict out of the OS environment too
 env = smartdict.SmartDict()
 env.update(os.environ)
 
-# import the main m5 config code
-from config import *
-
-# import the built-in object definitions
-from objects import *
-
-
-args_left = sys.argv[1:]
-configfile_found = False
-
-while args_left:
-    arg = args_left.pop(0)
-    if arg.startswith('--'):
-        # if arg starts with '--', parse as a special python option
-        # of the format --<python var>=<string value>
-        try:
-            (var, val) = arg.split('=', 1)
-            var = var[2:]
-        except ValueError:
-            panic("Could not parse configuration argument '%s'\n"
-                  "Expecting --<variable>=<value>\n" % arg);
-        exec "%s = %s" % (var, repr(val))
-    elif arg.startswith('-'):
-        # if the arg starts with '-', it should be a simulator option
-        # with a format similar to getopt.
-        optchar = arg[1]
-        if len(arg) > 2:
-            args_left.insert(0, arg[2:])
-        if optchar == 'd':
-            outdir = args_left.pop(0)
-        elif optchar == 'h':
-            showBriefHelp(sys.stderr)
-            sys.exit(1)
-        elif optchar == 'E':
-            env_str = args_left.pop(0)
-            split_result = env_str.split('=', 1)
-            var = split_result[0]
-            if len(split_result == 2):
-                val = split_result[1]
-            else:
-                val = True
-            env[var] = val
-        elif optchar == 'I':
-            AddToPath(args_left.pop(0))
-        elif optchar == 'P':
-            exec args_left.pop(0)
-        else:
-            showBriefHelp(sys.stderr)
-            panic("invalid argument '%s'\n" % arg_str)
-    else:
-        # In any other case, treat the option as a configuration file
-        # name and load it.
-        if not arg.endswith('.py'):
-            panic("Config file '%s' must end in '.py'\n" % arg)
-        configfile_found = True
-        m5execfile(arg, globals())
-
-
-if not configfile_found:
-    panic("no configuration file specified!")
-
-if globals().has_key('root') and isinstance(root, Root):
+# The final hook to generate .ini files.  Called from the user script
+# once the config is built.
+def instantiate(root):
+    config.ticks_per_sec = float(root.clock.frequency)
+    # ugly temporary hack to get output to config.ini
     sys.stdout = file('config.ini', 'w')
-    instantiate(root)
-else:
-    print 'Instantiation skipped: no root object found.'
-
+    root.print_ini()
+    sys.stdout.close() # close config.ini
+    sys.stdout = sys.__stdout__ # restore to original
+    main.initialize()  # load config.ini into C++ and process it
+    noDot = True # temporary until we fix dot
+    if not noDot:
+       dot = pydot.Dot()
+       instance.outputDot(dot)
+       dot.orientation = "portrait"
+       dot.size = "8.5,11"
+       dot.ranksep="equally"
+       dot.rank="samerank"
+       dot.write("config.dot")
+       dot.write_ps("config.ps")
+
+# Export curTick to user script.
+def curTick():
+    return main.cvar.curTick
+
+# register our C++ exit callback function with Python
+atexit.register(main.doExitCleanup)
+
+# This import allows user scripts to reference 'm5.objects.Foo' after
+# just doing an 'import m5' (without an 'import m5.objects').  May not
+# matter since most scripts will probably 'from m5.objects import *'.
+import objects
diff --git a/src/python/m5/config.py b/src/python/m5/config.py
index d1471c807..f6a2a84fb 100644
--- a/src/python/m5/config.py
+++ b/src/python/m5/config.py
@@ -728,7 +728,7 @@ class ParamDesc(object):
     def __getattr__(self, attr):
         if attr == 'ptype':
             try:
-                ptype = eval(self.ptype_str, m5.__dict__)
+                ptype = eval(self.ptype_str, m5.objects.__dict__)
                 if not isinstance(ptype, type):
                     panic("Param qualifier is not a type: %s" % self.ptype)
                 self.ptype = ptype
@@ -1290,23 +1290,6 @@ AllMemory = AddrRange(0, MaxAddr)
 
 #####################################################################
 
-# The final hook to generate .ini files.  Called from configuration
-# script once config is built.
-def instantiate(root):
-    global ticks_per_sec
-    ticks_per_sec = float(root.clock.frequency)
-    root.print_ini()
-    noDot = True # temporary until we fix dot
-    if not noDot:
-       dot = pydot.Dot()
-       instance.outputDot(dot)
-       dot.orientation = "portrait"
-       dot.size = "8.5,11"
-       dot.ranksep="equally"
-       dot.rank="samerank"
-       dot.write("config.dot")
-       dot.write_ps("config.ps")
-
 # __all__ defines the list of symbols that get exported when
 # 'from config import *' is invoked.  Try to keep this reasonably
 # short to avoid polluting other namespaces.
@@ -1322,5 +1305,5 @@ __all__ = ['SimObject', 'ParamContext', 'Param', 'VectorParam',
            'NetworkBandwidth', 'MemoryBandwidth',
            'Range', 'AddrRange', 'MaxAddr', 'MaxTick', 'AllMemory',
            'Null', 'NULL',
-           'NextEthernetAddr', 'instantiate']
+           'NextEthernetAddr']
 
diff --git a/src/python/m5/objects/AlphaConsole.py b/src/python/m5/objects/AlphaConsole.py
index 68e6089ab..329b8c5bd 100644
--- a/src/python/m5/objects/AlphaConsole.py
+++ b/src/python/m5/objects/AlphaConsole.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 from Device import BasicPioDevice
 
 class AlphaConsole(BasicPioDevice):
diff --git a/src/python/m5/objects/AlphaFullCPU.py b/src/python/m5/objects/AlphaFullCPU.py
index 7c772d3f2..2988305d3 100644
--- a/src/python/m5/objects/AlphaFullCPU.py
+++ b/src/python/m5/objects/AlphaFullCPU.py
@@ -1,4 +1,5 @@
-from m5 import *
+from m5 import build_env
+from m5.config import *
 from BaseCPU import BaseCPU
 
 class DerivAlphaFullCPU(BaseCPU):
diff --git a/src/python/m5/objects/AlphaTLB.py b/src/python/m5/objects/AlphaTLB.py
index 5edf8e13d..11c1792ee 100644
--- a/src/python/m5/objects/AlphaTLB.py
+++ b/src/python/m5/objects/AlphaTLB.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 class AlphaTLB(SimObject):
     type = 'AlphaTLB'
     abstract = True
diff --git a/src/python/m5/objects/BadDevice.py b/src/python/m5/objects/BadDevice.py
index 9cb9a8f03..186b733fa 100644
--- a/src/python/m5/objects/BadDevice.py
+++ b/src/python/m5/objects/BadDevice.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 from Device import BasicPioDevice
 
 class BadDevice(BasicPioDevice):
diff --git a/src/python/m5/objects/BaseCPU.py b/src/python/m5/objects/BaseCPU.py
index 49cb2a8f3..2e78578df 100644
--- a/src/python/m5/objects/BaseCPU.py
+++ b/src/python/m5/objects/BaseCPU.py
@@ -1,4 +1,6 @@
-from m5 import *
+from m5 import build_env
+from m5.config import *
+
 class BaseCPU(SimObject):
     type = 'BaseCPU'
     abstract = True
diff --git a/src/python/m5/objects/BaseCache.py b/src/python/m5/objects/BaseCache.py
index 79d21572a..33f44759b 100644
--- a/src/python/m5/objects/BaseCache.py
+++ b/src/python/m5/objects/BaseCache.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 from BaseMem import BaseMem
 
 class Prefetch(Enum): vals = ['none', 'tagged', 'stride', 'ghb']
diff --git a/src/python/m5/objects/Bridge.py b/src/python/m5/objects/Bridge.py
index ada715ce9..880535755 100644
--- a/src/python/m5/objects/Bridge.py
+++ b/src/python/m5/objects/Bridge.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 from MemObject import MemObject
 
 class Bridge(MemObject):
diff --git a/src/python/m5/objects/Bus.py b/src/python/m5/objects/Bus.py
index 8c5397281..c37dab438 100644
--- a/src/python/m5/objects/Bus.py
+++ b/src/python/m5/objects/Bus.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 from MemObject import MemObject
 
 class Bus(MemObject):
diff --git a/src/python/m5/objects/CoherenceProtocol.py b/src/python/m5/objects/CoherenceProtocol.py
index 7013000d6..64b6cbacf 100644
--- a/src/python/m5/objects/CoherenceProtocol.py
+++ b/src/python/m5/objects/CoherenceProtocol.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 class Coherence(Enum): vals = ['uni', 'msi', 'mesi', 'mosi', 'moesi']
 
 class CoherenceProtocol(SimObject):
diff --git a/src/python/m5/objects/Device.py b/src/python/m5/objects/Device.py
index 2a71bbc65..7798f5f04 100644
--- a/src/python/m5/objects/Device.py
+++ b/src/python/m5/objects/Device.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 from MemObject import MemObject
 
 class PioDevice(MemObject):
diff --git a/src/python/m5/objects/DiskImage.py b/src/python/m5/objects/DiskImage.py
index 0d55e9329..70d8b2e45 100644
--- a/src/python/m5/objects/DiskImage.py
+++ b/src/python/m5/objects/DiskImage.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 class DiskImage(SimObject):
     type = 'DiskImage'
     abstract = True
diff --git a/src/python/m5/objects/Ethernet.py b/src/python/m5/objects/Ethernet.py
index 4286c71c8..418670592 100644
--- a/src/python/m5/objects/Ethernet.py
+++ b/src/python/m5/objects/Ethernet.py
@@ -1,4 +1,5 @@
-from m5 import *
+from m5 import build_env
+from m5.config import *
 from Device import DmaDevice
 from Pci import PciDevice
 
diff --git a/src/python/m5/objects/Ide.py b/src/python/m5/objects/Ide.py
index 2403e6d36..9ee578177 100644
--- a/src/python/m5/objects/Ide.py
+++ b/src/python/m5/objects/Ide.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 from Pci import PciDevice
 
 class IdeID(Enum): vals = ['master', 'slave']
diff --git a/src/python/m5/objects/IntrControl.py b/src/python/m5/objects/IntrControl.py
index 66c82c182..514c3fc62 100644
--- a/src/python/m5/objects/IntrControl.py
+++ b/src/python/m5/objects/IntrControl.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 class IntrControl(SimObject):
     type = 'IntrControl'
     cpu = Param.BaseCPU(Parent.any, "the cpu")
diff --git a/src/python/m5/objects/MemObject.py b/src/python/m5/objects/MemObject.py
index 4d68243e6..d957dae17 100644
--- a/src/python/m5/objects/MemObject.py
+++ b/src/python/m5/objects/MemObject.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 
 class MemObject(SimObject):
     type = 'MemObject'
diff --git a/src/python/m5/objects/MemTest.py b/src/python/m5/objects/MemTest.py
index 34299faf0..9916d7cb4 100644
--- a/src/python/m5/objects/MemTest.py
+++ b/src/python/m5/objects/MemTest.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 class MemTest(SimObject):
     type = 'MemTest'
     cache = Param.BaseCache("L1 cache")
diff --git a/src/python/m5/objects/Pci.py b/src/python/m5/objects/Pci.py
index 85cefcd44..9e1e91b13 100644
--- a/src/python/m5/objects/Pci.py
+++ b/src/python/m5/objects/Pci.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 from Device import BasicPioDevice, DmaDevice
 
 class PciConfigData(SimObject):
diff --git a/src/python/m5/objects/PhysicalMemory.py b/src/python/m5/objects/PhysicalMemory.py
index c59910093..bed90d555 100644
--- a/src/python/m5/objects/PhysicalMemory.py
+++ b/src/python/m5/objects/PhysicalMemory.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 from MemObject import *
 
 class PhysicalMemory(MemObject):
diff --git a/src/python/m5/objects/Platform.py b/src/python/m5/objects/Platform.py
index 4da0ffab4..89fee9991 100644
--- a/src/python/m5/objects/Platform.py
+++ b/src/python/m5/objects/Platform.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 class Platform(SimObject):
     type = 'Platform'
     abstract = True
diff --git a/src/python/m5/objects/Process.py b/src/python/m5/objects/Process.py
index 60b00229e..0091d8654 100644
--- a/src/python/m5/objects/Process.py
+++ b/src/python/m5/objects/Process.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 class Process(SimObject):
     type = 'Process'
     abstract = True
diff --git a/src/python/m5/objects/Repl.py b/src/python/m5/objects/Repl.py
index afd256082..8e9f1094f 100644
--- a/src/python/m5/objects/Repl.py
+++ b/src/python/m5/objects/Repl.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 class Repl(SimObject):
     type = 'Repl'
     abstract = True
diff --git a/src/python/m5/objects/Root.py b/src/python/m5/objects/Root.py
index 205a93c76..373475a7a 100644
--- a/src/python/m5/objects/Root.py
+++ b/src/python/m5/objects/Root.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 from Serialize import Serialize
 from Statistics import Statistics
 from Trace import Trace
diff --git a/src/python/m5/objects/SimConsole.py b/src/python/m5/objects/SimConsole.py
index df3061908..9e1452c6d 100644
--- a/src/python/m5/objects/SimConsole.py
+++ b/src/python/m5/objects/SimConsole.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 class ConsoleListener(SimObject):
     type = 'ConsoleListener'
     port = Param.TcpPort(3456, "listen port")
diff --git a/src/python/m5/objects/SimpleDisk.py b/src/python/m5/objects/SimpleDisk.py
index e34155ace..44ef709af 100644
--- a/src/python/m5/objects/SimpleDisk.py
+++ b/src/python/m5/objects/SimpleDisk.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 class SimpleDisk(SimObject):
     type = 'SimpleDisk'
     disk = Param.DiskImage("Disk Image")
diff --git a/src/python/m5/objects/System.py b/src/python/m5/objects/System.py
index 622b5a870..a8063a274 100644
--- a/src/python/m5/objects/System.py
+++ b/src/python/m5/objects/System.py
@@ -1,4 +1,5 @@
-from m5 import *
+from m5 import build_env
+from m5.config import *
 
 class System(SimObject):
     type = 'System'
diff --git a/src/python/m5/objects/Tsunami.py b/src/python/m5/objects/Tsunami.py
index 27ea0bce8..4613571d8 100644
--- a/src/python/m5/objects/Tsunami.py
+++ b/src/python/m5/objects/Tsunami.py
@@ -1,4 +1,4 @@
-from m5 import *
+from m5.config import *
 from Device import BasicPioDevice
 from Platform import Platform
 
diff --git a/src/python/m5/objects/Uart.py b/src/python/m5/objects/Uart.py
index 54754aeb9..8e1fd1a37 100644
--- a/src/python/m5/objects/Uart.py
+++ b/src/python/m5/objects/Uart.py
@@ -1,4 +1,5 @@
-from m5 import *
+from m5 import build_env
+from m5.config import *
 from Device import BasicPioDevice
 
 class Uart(BasicPioDevice):