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author | Andreas Hansson <andreas.hansson@arm.com> | 2013-01-07 13:05:38 -0500 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2013-01-07 13:05:38 -0500 |
commit | 01c55983737273c70e44e0181e75453e01c5da34 (patch) | |
tree | 2a1c68d06c39a1cf1554d589df8961a313cb9c25 /src/python/swig | |
parent | e6c57786a43b6e21e11dec95d2fcb2c965d84abb (diff) | |
download | gem5-01c55983737273c70e44e0181e75453e01c5da34.tar.xz |
mem: Add interleaving bits to the address ranges
This patch adds support for interleaving bits for the address
ranges. What was previously just a start and end address, now has an
additional three fields, for the high bit, and number of bits to use
for interleaving, and a match value to compare against. If the number
of interleaving bits is set to zero it is effectively disabled.
A number of convenience functions are added to the range to enquire
about the interleaving, its granularity and the number of stripes it
is part of.
Diffstat (limited to 'src/python/swig')
0 files changed, 0 insertions, 0 deletions