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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2006-10-17 21:15:11 -0700 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2006-10-17 21:15:11 -0700 |
| commit | 05c487ef3ce6eb015bc8716df7e9caeedfe520da (patch) | |
| tree | c07416ce66140f08c2e250e640b49cd3d89a6660 /src/python | |
| parent | e51b075a2706180bdc262cbcbdd5bafe5896ba12 (diff) | |
| download | gem5-05c487ef3ce6eb015bc8716df7e9caeedfe520da.tar.xz | |
Enable MP systems via cmd-line flag in fs.py.
configs/example/fs.py:
Add flag for MP server systems.
src/python/m5/objects/AlphaConsole.py:
src/python/m5/objects/IntrControl.py:
Change CPU from 'any' to 'cpu[0]' to work better with MP sytems.
tests/configs/tsunami-simple-atomic-dual.py:
tests/configs/tsunami-simple-timing-dual.py:
Don't need to set console & intrcontrol cpu
params anymore (default is fixed now).
--HG--
extra : convert_revision : 9417b12b1b395ff7d6a9f2894e4123923c754daf
Diffstat (limited to 'src/python')
| -rw-r--r-- | src/python/m5/objects/AlphaConsole.py | 2 | ||||
| -rw-r--r-- | src/python/m5/objects/IntrControl.py | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/python/m5/objects/AlphaConsole.py b/src/python/m5/objects/AlphaConsole.py index 1c71493b1..f968aaa40 100644 --- a/src/python/m5/objects/AlphaConsole.py +++ b/src/python/m5/objects/AlphaConsole.py @@ -4,7 +4,7 @@ from Device import BasicPioDevice class AlphaConsole(BasicPioDevice): type = 'AlphaConsole' - cpu = Param.BaseCPU(Parent.any, "Processor") + cpu = Param.BaseCPU(Parent.cpu[0], "Processor") disk = Param.SimpleDisk("Simple Disk") sim_console = Param.SimConsole(Parent.any, "The Simulator Console") system = Param.AlphaSystem(Parent.any, "system object") diff --git a/src/python/m5/objects/IntrControl.py b/src/python/m5/objects/IntrControl.py index 95be0f4df..a7cf5cc84 100644 --- a/src/python/m5/objects/IntrControl.py +++ b/src/python/m5/objects/IntrControl.py @@ -3,4 +3,4 @@ from m5.params import * from m5.proxy import * class IntrControl(SimObject): type = 'IntrControl' - cpu = Param.BaseCPU(Parent.any, "the cpu") + cpu = Param.BaseCPU(Parent.cpu[0], "the cpu") |