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authorKevin Lim <ktlim@umich.edu>2006-11-02 15:20:37 -0500
committerKevin Lim <ktlim@umich.edu>2006-11-02 15:20:37 -0500
commit45363ea658251df0c31a75d7bd5d0ac3a3809623 (patch)
treebae91271cf1e57d6cacbf0bbe4853f0db0067797 /src/python
parentc3485a654888f641dca23128f8197ef747c706d2 (diff)
downloadgem5-45363ea658251df0c31a75d7bd5d0ac3a3809623.tar.xz
Have bus use the BadAddress device to handle bad addresses. The O3 CPU should be able to boot into Linux with caches on after this change.
src/mem/bus.cc: src/mem/bus.hh: Bus now will be setup with a default responder, unless the user overrides it. This default responder should return BadAddress if no matching port is found. src/python/m5/objects/Bus.py: Bus now has a default responder for FS mode if the user doesn't override it. It returns BadAddress if no matching port is found. src/python/m5/objects/Tsunami.py: Add bad address device. Also record when the user has specified their own default responder. --HG-- extra : convert_revision : 59070477ae313ee711b2d59baa2369c9a91c5b85
Diffstat (limited to 'src/python')
-rw-r--r--src/python/m5/objects/Bus.py10
-rw-r--r--src/python/m5/objects/Tsunami.py4
2 files changed, 13 insertions, 1 deletions
diff --git a/src/python/m5/objects/Bus.py b/src/python/m5/objects/Bus.py
index 6710111e5..e7019f3ac 100644
--- a/src/python/m5/objects/Bus.py
+++ b/src/python/m5/objects/Bus.py
@@ -1,10 +1,18 @@
+from m5 import build_env
from m5.params import *
+from m5.proxy import *
from MemObject import MemObject
+from Tsunami import BadAddr
class Bus(MemObject):
type = 'Bus'
port = VectorPort("vector port for connecting devices")
- default = Port("Default port for requests that aren't handeled by a device.")
bus_id = Param.Int(0, "blah")
clock = Param.Clock("1GHz", "bus clock speed")
width = Param.Int(64, "bus width (bytes)")
+ responder_set = Param.Bool(False, "Did the user specify a default responder.")
+ if build_env['FULL_SYSTEM']:
+ default = Port(Self.responder.pio, "Default port for requests that aren't handled by a device.")
+ responder = BadAddr(pio_addr=0x0, pio_latency="1ps")
+ else:
+ default = Port("Default port for requests that aren't handled by a device.")
diff --git a/src/python/m5/objects/Tsunami.py b/src/python/m5/objects/Tsunami.py
index 0b53153a0..42bcab089 100644
--- a/src/python/m5/objects/Tsunami.py
+++ b/src/python/m5/objects/Tsunami.py
@@ -15,6 +15,9 @@ class IsaFake(BasicPioDevice):
type = 'IsaFake'
pio_size = Param.Addr(0x8, "Size of address range")
+class BadAddr(BasicPioDevice):
+ type = 'BadAddr'
+
class TsunamiIO(BasicPioDevice):
type = 'TsunamiIO'
time = Param.UInt64(1136073600,
@@ -70,6 +73,7 @@ class Tsunami(Platform):
self.cchip.pio = bus.port
self.pchip.pio = bus.port
self.pciconfig.pio = bus.default
+ bus.responder_set = True
self.fake_sm_chip.pio = bus.port
self.fake_uart1.pio = bus.port
self.fake_uart2.pio = bus.port