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authorAndreas Hansson <andreas.hansson@arm.com>2012-02-14 14:15:30 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2012-02-14 14:15:30 -0500
commit6cf9f182f678e4ddf2a2b98a5093a7418353217c (patch)
tree9de2665814818b7ce04cf7b2c85cc907b71a3581 /src/python
parentac91f90145f824b202d79a9e275fc5cee1071159 (diff)
downloadgem5-6cf9f182f678e4ddf2a2b98a5093a7418353217c.tar.xz
MEM: Fix residual bus ports and make them master/slave
This patch cleans up a number of remaining uses of bus.port which is now split into bus.master and bus.slave. The only non-trivial change is the memtest where the level building now has to be aware of the role of the ports used in the previous level.
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