types: Move stuff for global types into src/base/types.hh

--HG--
rename : src/sim/host.hh => src/base/types.hh

9 files changed, 17 insertions, 17 deletions

diff --git a/src/python/m5/params.py b/src/python/m5/params.py
index 18eeac0d1..edd78fa28 100644
--- a/src/python/m5/params.py
+++ b/src/python/m5/params.py
@@ -317,12 +317,12 @@ class CheckedIntType(MetaParamValue):
 
         if not cls.cxx_predecls:
             # most derived types require this, so we just do it here once
-            cls.cxx_predecls = ['#include "sim/host.hh"']
+            cls.cxx_predecls = ['#include "base/types.hh"']
 
         if not cls.swig_predecls:
             # most derived types require this, so we just do it here once
             cls.swig_predecls = ['%import "stdint.i"\n' +
-                                 '%import "sim/host.hh"']
+                                 '%import "base/types.hh"']
 
         if not (hasattr(cls, 'min') and hasattr(cls, 'max')):
             if not (hasattr(cls, 'size') and hasattr(cls, 'unsigned')):
@@ -766,9 +766,9 @@ frequency_tolerance = 0.001  # 0.1%
 
 class TickParamValue(NumericParamValue):
     cxx_type = 'Tick'
-    cxx_predecls = ['#include "sim/host.hh"']
+    cxx_predecls = ['#include "base/types.hh"']
     swig_predecls = ['%import "stdint.i"\n' +
-                     '%import "sim/host.hh"']
+                     '%import "base/types.hh"']
 
     def getValue(self):
         return long(self.value)
@@ -844,9 +844,9 @@ class Frequency(TickParamValue):
 # An explicit conversion to a Latency or Frequency must be made first.
 class Clock(ParamValue):
     cxx_type = 'Tick'
-    cxx_predecls = ['#include "sim/host.hh"']
+    cxx_predecls = ['#include "base/types.hh"']
     swig_predecls = ['%import "stdint.i"\n' +
-                     '%import "sim/host.hh"']
+                     '%import "base/types.hh"']
     def __init__(self, value):
         if isinstance(value, (Latency, Clock)):
             self.ticks = value.ticks
diff --git a/src/python/swig/core.i b/src/python/swig/core.i
index c567bea4d..eefe106a4 100644
--- a/src/python/swig/core.i
+++ b/src/python/swig/core.i
@@ -37,7 +37,7 @@
 #include "base/misc.hh"
 #include "base/socket.hh"
 #include "sim/core.hh"
-#include "sim/host.hh"
+#include "base/types.hh"
 #include "sim/startup.hh"
 
 extern const char *compileDate;
@@ -59,7 +59,7 @@ inline void disableAllListeners() { ListenSocket::disableAll(); }
 
 %include "stdint.i"
 %include "std_string.i"
-%include "sim/host.hh"
+%include "base/types.hh"
 
 void setOutputDir(const std::string &dir);
 void SimStartup();
diff --git a/src/python/swig/debug.i b/src/python/swig/debug.i
index 1084d6936..b7fdb2171 100644
--- a/src/python/swig/debug.i
+++ b/src/python/swig/debug.i
@@ -31,12 +31,12 @@
 %module debug
 
 %{
-#include "sim/host.hh"
+#include "base/types.hh"
 #include "sim/debug.hh"
 %}
 
 %include "stdint.i"
-%include "sim/host.hh"
+%include "base/types.hh"
 %include "sim/debug.hh"
 
 %wrapper %{
diff --git a/src/python/swig/event.i b/src/python/swig/event.i
index b40e59a4b..c09f12016 100644
--- a/src/python/swig/event.i
+++ b/src/python/swig/event.i
@@ -32,7 +32,7 @@
 
 %{
 #include "python/swig/pyevent.hh"
-#include "sim/host.hh"
+#include "base/types.hh"
 #include "sim/eventq.hh"
 #include "sim/sim_events.hh"
 #include "sim/sim_exit.hh"
@@ -75,7 +75,7 @@
 
 %include "stdint.i"
 %include "std_string.i"
-%include "sim/host.hh"
+%include "base/types.hh"
 %include "sim/eventq.hh"
 %include "python/swig/pyevent.hh"
 
diff --git a/src/python/swig/pyobject.hh b/src/python/swig/pyobject.hh
index e895be636..d11dc323c 100644
--- a/src/python/swig/pyobject.hh
+++ b/src/python/swig/pyobject.hh
@@ -31,7 +31,7 @@
 #include <Python.h>
 
 #include "cpu/base.hh"
-#include "sim/host.hh"
+#include "base/types.hh"
 #include "sim/serialize.hh"
 #include "sim/sim_object.hh"
 #include "sim/system.hh"
diff --git a/src/python/swig/random.i b/src/python/swig/random.i
index 657a59780..d9ea2a404 100644
--- a/src/python/swig/random.i
+++ b/src/python/swig/random.i
@@ -35,7 +35,7 @@
 %{
 #include <cstdlib>
 
-#include "sim/host.hh"
+#include "base/types.hh"
 
 inline void
 seed(uint64_t seed)
diff --git a/src/python/swig/range.i b/src/python/swig/range.i
index 309e6a8ba..659bde8d7 100644
--- a/src/python/swig/range.i
+++ b/src/python/swig/range.i
@@ -31,7 +31,7 @@
 %rename(assign) *::operator=;
 
 %include "base/range.hh"
-%include "sim/host.hh"
+%include "base/types.hh"
 
 %template(AddrRange) Range<Addr>;
 %template(TickRange) Range<Tick>;
diff --git a/src/python/swig/sim_object.i b/src/python/swig/sim_object.i
index 2280fc0e3..840aea998 100644
--- a/src/python/swig/sim_object.i
+++ b/src/python/swig/sim_object.i
@@ -37,7 +37,7 @@
 // import these files for SWIG to wrap
 %include "stdint.i"
 %include "std_string.i"
-%include "sim/host.hh"
+%include "base/types.hh"
 
 class BaseCPU;
 
diff --git a/src/python/swig/trace.i b/src/python/swig/trace.i
index 69b44c025..57ab3d3ec 100644
--- a/src/python/swig/trace.i
+++ b/src/python/swig/trace.i
@@ -32,7 +32,7 @@
 
 %{
 #include "base/trace.hh"
-#include "sim/host.hh"
+#include "base/types.hh"
 
 inline void
 output(const char *filename)