summaryrefslogtreecommitdiff
path: root/src/sim/InstTracer.py
diff options
context:
space:
mode:
authorAndreas Sandberg <Andreas.Sandberg@arm.com>2013-01-07 13:05:35 -0500
committerAndreas Sandberg <Andreas.Sandberg@arm.com>2013-01-07 13:05:35 -0500
commit0d1ad50326a13a24daed916a069fc9f45775f51d (patch)
tree69402307a753e23fb617538b93ad485f8e5b9598 /src/sim/InstTracer.py
parent3db3f83a5ea4b9565db1ab6b22d18e2b33ecef98 (diff)
downloadgem5-0d1ad50326a13a24daed916a069fc9f45775f51d.tar.xz
arm: Make ID registers ISA parameters
This patch makes the values of ID_ISARx, MIDR, and FPSID configurable as ISA parameter values. Additionally, setMiscReg now ignores writes to all of the ID registers. Note: This moves the MIDR parameter from ArmSystem to ArmISA for consistency.
Diffstat (limited to 'src/sim/InstTracer.py')
0 files changed, 0 insertions, 0 deletions