diff options
| author | Stephan Diestelhorst <stephan.diestelhorst@arm.com> | 2014-06-30 13:56:06 -0400 |
|---|---|---|
| committer | Stephan Diestelhorst <stephan.diestelhorst@arm.com> | 2014-06-30 13:56:06 -0400 |
| commit | 65cea4708e2f2f2cb361e12b6385d4bc29618223 (patch) | |
| tree | 9f190702d43e89e2ddb44b6af363330f301ec8fb /src/sim/SConscript | |
| parent | 641e6028304187468b94753752555e9d082a77ac (diff) | |
| download | gem5-65cea4708e2f2f2cb361e12b6385d4bc29618223.tar.xz | |
power: Add basic DVFS support for gem5
Adds DVFS capabilities to gem5, by allowing users to specify lists for
frequencies and voltages in SrcClockDomains and VoltageDomains respectively.
A separate component, DVFSHandler, provides a small interface to change
operating points of the associated domains.
Clock domains will be linked to voltage domains and thus allow separate clock,
but shared voltage lines.
Currently all the valid performance-level updates are performed with a fixed
transition latency as specified for the domain.
Config file example:
...
vd = VoltageDomain(voltage = ['1V','0.95V','0.90V','0.85V'])
tsys.cluster1.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster2.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster1.clk_domain.domain_id = 0
tsys.cluster2.clk_domain.domain_id = 1
tsys.cluster1.clk_domain.voltage_domain = vd
tsys.cluster2.clk_domain.voltage_domain = vd
tsys.dvfs_handler.domains = [tsys.cluster1.clk_domain,
tsys.cluster2.clk_domain]
tsys.dvfs_handler.enable = True
Diffstat (limited to 'src/sim/SConscript')
| -rw-r--r-- | src/sim/SConscript | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/sim/SConscript b/src/sim/SConscript index 769c8240d..5a5c1ab8a 100644 --- a/src/sim/SConscript +++ b/src/sim/SConscript @@ -36,6 +36,7 @@ SimObject('Root.py') SimObject('ClockDomain.py') SimObject('VoltageDomain.py') SimObject('System.py') +SimObject('DVFSHandler.py') Source('arguments.cc') Source('async.cc') @@ -55,6 +56,7 @@ Source('stat_control.cc') Source('clock_domain.cc') Source('voltage_domain.cc') Source('system.cc') +Source('dvfs_handler.cc') if env['TARGET_ISA'] != 'null': SimObject('InstTracer.py') @@ -86,3 +88,4 @@ DebugFlag('VtoPhys') DebugFlag('WorkItems') DebugFlag('ClockDomain') DebugFlag('VoltageDomain') +DebugFlag('DVFS') |