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authorSteve Reinhardt <stever@gmail.com>2007-08-03 03:51:30 -0400
committerSteve Reinhardt <stever@gmail.com>2007-08-03 03:51:30 -0400
commit3afc6259757e8ec688701bf3e3d7fcdad28d5b6c (patch)
tree35c0e1ebb596dfe94934fc0f5f064eb523b3013b /src/sim/System.py
parent62aa1d7f559622dcb04b1b2fe1e2ecec375883a3 (diff)
parent121a894ce0d551e860392f9aa6bd381329a25b96 (diff)
downloadgem5-3afc6259757e8ec688701bf3e3d7fcdad28d5b6c.tar.xz
merge from head
--HG-- extra : convert_revision : 21f7afe2719c00744c0981212c1ee6e442238e01
Diffstat (limited to 'src/sim/System.py')
-rw-r--r--src/sim/System.py2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/sim/System.py b/src/sim/System.py
index 3f4c57f0c..5712a5c03 100644
--- a/src/sim/System.py
+++ b/src/sim/System.py
@@ -36,6 +36,8 @@ class MemoryMode(Enum): vals = ['invalid', 'atomic', 'timing']
class System(SimObject):
type = 'System'
+ swig_objdecls = [ '%include "python/swig/system.i"' ]
+
physmem = Param.PhysicalMemory(Parent.any, "phsyical memory")
mem_mode = Param.MemoryMode('atomic', "The mode the memory system is in")
if build_env['FULL_SYSTEM']: