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author | Rekai Gonzalez-Alberquilla <Rekai.GonzalezAlberquilla@arm.com> | 2017-04-05 13:20:30 -0500 |
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committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-07-05 14:43:49 +0000 |
commit | 2da7656a9a2fbf30cac0caffa4a2d168f736b4a1 (patch) | |
tree | 11d2bd70ca04e751ad4664bb283ecc005462be28 /src/sim/async.cc | |
parent | a473b5a6eb269cc303ecfb5e5643d891a5d255d9 (diff) | |
download | gem5-2da7656a9a2fbf30cac0caffa4a2d168f736b4a1.tar.xz |
cpu: Result refactoring
The Result union used to collect the result of an instruction is now a
class of its own, with its constructor, and explicit casting methods for
cleanliness.
This is also a stepping stone to have vector registers, and instructions
that produce a vector register as output.
Change-Id: I6f40c11cb5e835d8b11f7804a4e967aff18025b9
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2703
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Diffstat (limited to 'src/sim/async.cc')
0 files changed, 0 insertions, 0 deletions