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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-06-26 16:18:56 +0100 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-07-03 09:47:19 +0000 |
| commit | 89530735d115578d7e88f1bba1f299becb1350ca (patch) | |
| tree | 1a557ed0ea48e2222b34deea66a36274d39aa2d0 /src/sim/clock_domain.cc | |
| parent | 3212bdf3a89addef371bd7d3f43c322b002644db (diff) | |
| download | gem5-89530735d115578d7e88f1bba1f299becb1350ca.tar.xz | |
config: Clean up core timing model discovery
Instead of hard-coding timing models in CpuConfig.py, use
introspection to find them in the cores.arm model package.
Change-Id: I6642dc9cbc3f5beeeec748e716c9426c233d51ea
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Gabor Dozsa <gabor.dozsa@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/3944
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Diffstat (limited to 'src/sim/clock_domain.cc')
0 files changed, 0 insertions, 0 deletions