power: Add basic DVFS support for gem5

Adds DVFS capabilities to gem5, by allowing users to specify lists for
frequencies and voltages in SrcClockDomains and VoltageDomains respectively.
A separate component, DVFSHandler, provides a small interface to change
operating points of the associated domains.

Clock domains will be linked to voltage domains and thus allow separate clock,
but shared voltage lines.

Currently all the valid performance-level updates are performed with a fixed
transition latency as specified for the domain.

Config file example:
...
vd = VoltageDomain(voltage = ['1V','0.95V','0.90V','0.85V'])
tsys.cluster1.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster2.clk_domain.clock = ['1GHz','700MHz','400MHz','230MHz']
tsys.cluster1.clk_domain.domain_id = 0
tsys.cluster2.clk_domain.domain_id = 1
tsys.cluster1.clk_domain.voltage_domain = vd
tsys.cluster2.clk_domain.voltage_domain = vd
tsys.dvfs_handler.domains = [tsys.cluster1.clk_domain,
                             tsys.cluster2.clk_domain]
tsys.dvfs_handler.enable = True

1 files changed, 87 insertions, 4 deletions

diff --git a/src/sim/clock_domain.hh b/src/sim/clock_domain.hh
index b597b6611..946e5bd27 100644
--- a/src/sim/clock_domain.hh
+++ b/src/sim/clock_domain.hh
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2013 ARM Limited
+ * Copyright (c) 2013-2014 ARM Limited
  * Copyright (c) 2013 Cornell University
  * All rights reserved
  *
@@ -38,6 +38,7 @@
  * Authors: Vasileios Spiliopoulos
  *          Akash Bagdia
  *          Christopher Torng
+ *          Stephan Diestelhorst
  */
 
 /**
@@ -119,7 +120,7 @@ class ClockDomain : public SimObject
      *
      * @return Clock period in ticks
      */
-    inline Tick clockPeriod() const { return _clockPeriod; }
+    Tick clockPeriod() const { return _clockPeriod; }
 
     /**
      * Register a ClockedObject to this ClockDomain.
@@ -146,7 +147,7 @@ class ClockDomain : public SimObject
      *
      * @return Voltage applied to the clock domain
      */
-    inline double voltage() const;
+    double voltage() const;
 
     /**
      * Add a derived domain.
@@ -161,7 +162,11 @@ class ClockDomain : public SimObject
 /**
  * The source clock domains provides the notion of a clock domain that is
  * connected to a tunable clock source. It maintains the clock period and
- * provides methods for setting/getting the clock.
+ * provides methods for setting/getting the clock and  configuration parameters
+ * for clock domain that handler is going to manage. This includes frequency
+ * values at various performance levels, domain id, and current performance
+ * level. Note that a performance level as requested by the software corresponds
+ * to one of the frequency operational points the domain can operate at.
  */
 class SrcClockDomain : public ClockDomain
 {
@@ -179,6 +184,84 @@ class SrcClockDomain : public ClockDomain
 
     // Explicitly import the otherwise hidden clockPeriod
     using ClockDomain::clockPeriod;
+
+    typedef int32_t DomainID;
+    static const DomainID emptyDomainID = -1;
+
+    /**
+     * @return the domainID of the domain
+     */
+    uint32_t domainID() const { return _domainID; }
+
+    typedef uint32_t PerfLevel;
+    /**
+     * Checks whether the performance level requested exists in the current
+     * domain configuration
+     *
+     * @param the target performance level of the domain
+     *
+     * @return validity status of the given performance level
+     */
+    bool validPerfLevel(PerfLevel perf_level) const {
+        return perf_level < numPerfLevels();
+    }
+
+    /**
+     * Sets the current performance level of the domain
+     *
+     * @param perf_level the target performance level
+     */
+    void perfLevel(PerfLevel perf_level);
+
+    /**
+     * @return the current performance level of the domain
+     */
+    PerfLevel perfLevel() const { return _perfLevel; }
+
+    /**
+     * Get the number of available performance levels for this clock domain.
+     *
+     * @return Number of perf levels configured for this domain.
+     */
+    PerfLevel numPerfLevels() const {return freqOpPoints.size();}
+
+    /**
+     * @returns the clock period (expressed in ticks) for the current
+     * performance level
+     */
+    Tick clkPeriodAtPerfLevel() const { return freqOpPoints[perfLevel()]; }
+
+    Tick clkPeriodAtPerfLevel(PerfLevel perf_level) const
+    {
+        assert(validPerfLevel(perf_level));
+        return freqOpPoints[perf_level];
+    }
+
+    void serialize(std::ostream &os);
+    void unserialize(Checkpoint *cp, const std::string &section);
+
+  private:
+    /**
+      * List of possible frequency operational points, should be in
+      * descending order
+      * An empty list corresponds to default frequency specified for its
+      * clock domain, overall implying NO DVFS
+      */
+    const std::vector<Tick> freqOpPoints;
+
+    /**
+      * Software recognizable id number for the domain, should be unique for
+      * each domain
+      */
+    const uint32_t _domainID;
+
+    /**
+      * Current performance level the domain is set to.
+      * The performance level corresponds to one selected frequency (and related
+      * voltage) from the supplied list of frequencies, with perfLevel = 0 being
+      * the fastest performance state.
+      */
+    PerfLevel _perfLevel;
 };
 
 /**